參數(shù)資料
型號(hào): BW1009L
英文描述: 16-bit bus buffer with 3-state outputs (non inverted)
中文描述: BW1009L 12位20MSPS模數(shù)轉(zhuǎn)換器|數(shù)據(jù)資料
文件頁(yè)數(shù): 9/13頁(yè)
文件大?。?/td> 144K
代理商: BW1009L
SEC ASIC
BW1009L
12-BIT 20MSPS ADC
MIXED
PACKAGE PIN DESCRIPTION
NOTES
1. I/O TYPE PP and PG denote PAD Power and PAD Ground respectively
No.
NAME
I/O
TYPE
PIN DESCRIPTION
CONFIGURATION
1
REFTOP1
AI
Reference Top Sense (2.0V)
2
REFTOP
AI
Reference Top Force (2.0V)
3
REFBOT
AI
Reference bottom Force (1.0V)
4
REFBOT1
AI
Reference bottom Sense (1.0V)
5
CML
AB
Internal Bias Point
6, 7
VDDA
AP
Analog Power (3.3V)
8
VBBA
AG
Analog Sub Bias
9, 10
VSSA
AG
Analog Ground
11
AINT
AI
Analog Input +
13
AINC
AI
Analog Input –
15
SPEEDUP
DI
VDD=Normal (
20MHz)
GND=Speed Down (
15MHz)
open=use internal bias circuit
16
ITEST
AB
17
STBY
DI
VDD=Power saving (Standby),
GND=Normal
18
VDDR
PP
PAD Power (3.3V)
19
VSSR
PG
PAD Ground
20
CKIN
DI
Sampling Clock Input
21
TEST1
AO
Monitoring (TEST) Cell Pin1,
GND=Normal
22
TEST2
AO
Monitoring (TEST) Cell Pin2,
GND=Normal
25
TRIST
DI
Tristate Buffer Input
VDD=High Impedance,
GND=Normal
27
DO[0]
DO
Digital Output (LSB)
28~37
DO[1:10]
DO
Digital Output
38
DO[11]
DO
Digital Output (MSB)
44
VBBD
DG
Digital Sub Bias
45, 46
VSSD
DG
Digital GND
47, 48
VDDD
DP
Digital Power (3.3V)
REFTOP
VBBA
TEST1
TEST2
NC
NC
BW1009L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REFTOP1
REFBOT
CML
VDDA
VDDA
VSSA
VSSA
AINT
NC
AINC
NC
SPEEDUP
ITEST
STBY
VDDR
VSSR
CKIN
VDDD
VDDD
VSSD
VSSD
VBBD
NC
NC
NC
NC
NC
DO[11]
DO[10]
DO[9]
DO[8]
DO[7]
DO[6]
DO[5]
DO[4]
DO[3]
DO[2]
DO[1]
DO[0]
NC
TRIST
REFBOT1
9/12
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