參數(shù)資料
型號: BW1009L
英文描述: 16-bit bus buffer with 3-state outputs (non inverted)
中文描述: BW1009L 12位20MSPS模數(shù)轉(zhuǎn)換器|數(shù)據(jù)資料
文件頁數(shù): 12/13頁
文件大小: 144K
代理商: BW1009L
SEC ASIC
BW1009L
12-BIT 20MSPS ADC
MIXED
FEEDBACK REQUEST
ADC Specification
Parameter
Min
Typ
Max
Unit
Remarks
Supply voltage
V
Reference Input voltage
V
Analog Input voltage
Vpp
Operating temperature
°C
Integral non-linearity error
LSB
Differential non-linearity error
LSB
Offset voltage error (Bottom)
mV
Offset voltage error (Top)
mV
Maximum conversion rate
MSPS
Dynamic supply current
mA
Power dissipation
mW
Signal-to-noise ratio
dB
Digital output format
(Provide detailed description
& timing diagram)
What do you want to choose as power supply voltages For example, the analog VDD needs to be 5V. the
digital VDD can be 3.3V/5V.
What resolution do you need for ADC
How about conversion speed (data in
data out)
How many cycles do exist during the latency of ADC (pipelined delay)
What's the input range And then what do you need between single input and differential input
Can the bus interface be compatible with TTL
Could you explain external/internal pin configurations as required
Specially requested function list :
12/12
相關(guān)PDF資料
PDF描述
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BW1219B Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1223X Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs
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