參數(shù)資料
型號: BW1009L
英文描述: 16-bit bus buffer with 3-state outputs (non inverted)
中文描述: BW1009L 12位20MSPS模數(shù)轉(zhuǎn)換器|數(shù)據(jù)資料
文件頁數(shù): 2/13頁
文件大?。?/td> 144K
代理商: BW1009L
SEC ASIC
BW1009L
12-BIT 20MSPS ADC
MIXED
CORE
PIN
DESCRIPTION
NAME
I/O TYPE
I/O PAD
PIN DESCRIPTION
REFTOP1
AI
piar50_bb
Reference Top Sense (2.0V)
REFTOP
AI
pia_bb
Reference Top Force (2.0V)
REFBOT
AI
pia_bb
Reference Bottom Force (1.0V)
REFBOT1
AI
piar50_bb
Reference Bottom Sense (1.0V)
VDDA
AP
vdda
Analog Power (3.3V)
VBBA
AG
vbba
Analog Sub Bias
VSSA
AG
vssa
Analog Ground
AINT
AI
piar50_bb
Analog Input +
(Input Range : 1.0V ~ 2.0V)
AINC
AI
piar50_bb
Analog Input –
(Input Range : 1.0V ~ 2.0V)
SPEEDUP
DI
picc_bb
VDD=Speed up, Normal (
20MHz)
GND=Speed down (
15MHz)
VDD=power saving (standby),
GND=normal
STBY
DI
picc_bb
CKIN
DI
picc_bb
Sampling Clock Input
D[11:0]
DO
poa_bb
Digital Output
VBBD
DG
vbba
Digital Sub Bias
VSSD
DG
vssd
Digital GND
VDDD
DP
vddd
Digital Power (3.3V)
I/ O TYPE ABBR.
AI : Analog Input
DI : Digital Input
AO : Analog Output
DO : Analog Output
AP : Analog Power
AG : Analog Ground
DP : Digital Power
DG : Digital Ground
AB : Analog Bidirection
DB : Digital Bidirection
bw1009l
AINC
STBY
CKIN
AINT
REFTOP1
REFTOP
REFBOT
REFBOT1
SPEEDUP
vdda vssa vbba vddd vssd vbbd
DO[11:0]
[MSB:LSB]
2/12
相關(guān)PDF資料
PDF描述
BW1217X 16-bit bus buffer with 3-state outputs (non inverted)
BW1218L Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1219A Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1219B Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1223X Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs
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