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Data Device Corporation
www.ddc-web.com
BU-65528 and BU-65527
F1 web-10/02-0
Time Tag Register: Maintains the value of a real-time clock. The
resolution of this register is programmable from among 2, 4, 8,
16, 32, and 64
s/LSB. The TAG_CLK input signal also may
cause an external oscillator to clock the Time Tag Register. Start-
of-Message (SOM) and End-of-Message (EOM) sequences in
BC, RT, and Message Monitor modes cause a write of the cur-
rent value of the Time Tag Register to the stack area of RAM.
Interrupt Status Register: Mirrors the Interrupt Mask Register
and contains a Master Interrupt bit. It allows the host processor
to determine the cause of an interrupt request by means of a sin-
gle READ operation.
Configuration Registers #3, #4, and #5: Used to enable many
of the BU-65528/27's advanced features. These include all the
enhanced mode features; that is, all the functionality beyond that
of the previous generation product, the BUS-65526 that makes
use of the Advanced Integrated Mux Hybrid with Enhanced RT
Features (AIM-HY'er). For all three modes, use of the Enhanced
Mode enables the various read-only bits in Configuration
Register #1.
For BC mode, the enhanced mode features include the expand-
ed BC Control Word and BC Block Status Word, additional Stop-
On-Error and Stop-On-Status Set functions, frame auto-repeat,
programmable intermessage gap times, automatic retries,
expanded Status Word Masking, and the capability to generate
interrupts following the completion of any selected message.
For RT mode, the enhanced mode features include the expand-
ed RT Block Status Word, the combined RT/Selective Message
Monitor mode, internal wrapping of the internal
signal to
the RTFLAG RT Status Word bit, the double buffering scheme for
individual receive (broadcast) subaddresses, and the alternate
(fully software programmable) RT Status Word.
RTFAIL
For MT mode, use of the enhanced mode enables use of the
Selective Message Monitor, the combined RT/Selective Monitor
modes, and the monitor triggering capability.
Data Stack Address Register: Used to point to the current
address location in shared RAM used for storing message words
(second Command Words, Data Words, RT Status Words) in the
Selective Word Monitor mode.
Frame Time Remaining Register: Provides a Read-Only indi-
cation of the time remaining in the current BC frame. The resolu-
tion of this register is 100
s/LSB.
Message Time Remaining Register: Provides a Read-Only
indication of the time remaining before the start of the next mes-
sage in a BC frame. The resolution of this register is 1
s/LSB.
BC Frame/RT Last Command/MT Trigger Word Register: In
BC mode, it programs the BC frame time, for use in the frame
auto-repeat mode. The resolution of this register is 100
s/LSB,
with a range of 6.55 seconds; in RT mode, this register stores the
current (or most previous) 1553 Command Word processed by
the ACE RT; in the Word Monitor mode, this register specifies a
16-bit Trigger (Command) Word. The Trigger Word may be used
to start or stop the monitor, or to generate interrupts.
Status Word Register and BIT Word Registers: Provide Read-
Only indications of the BU-65528/27's RT Status and BIT Words.
Test Mode Registers 0-7: These registers are normally used to
facilitate production testing of the BU-65528/27.