參數(shù)資料
型號: BU-61705F4-202
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CQFP72
封裝: 1 X 1 INCH, 0.155 INCH HEIGHT, CERAMIC, FP-72
文件頁數(shù): 49/52頁
文件大?。?/td> 359K
代理商: BU-61705F4-202
BUSY
The external subsystem may control the SSRT's Busy RT status
word bit by means of the
input signal. The SSRT samples
approximately 2 s following the mid-parity bit zero cross-
ing of the received Command Word. If
is sampled low for
a particular message, the value of the busy bit transmitted in the
SSRT's status word will be logic "1". If
is sampled high for
a particular message, the value of the busy bit transmitted in the
SSRT's status word will be logic "0".
If the RT responds to a transmit command with a busy bit of logic
"1", the status word will be transmitted, but no data words will be
transmitted by the SSRT. If the SSRT responds to a receive com-
mand with a busy bit of logic "1", data words will be transferred
to the external subsystem (although these may be blocked by
means of external logic).
Similar to
, it is possible to cause the SSRT to respond
with Busy for specific command words (only), by means of an
external PROM, RAM, or PLD device.
TRANSMIT COMMAND (RT-TO-BC TRANSFER)
If the BU-61703/5 receives a valid Transmit command word that
the subsystem determines is legal (input signal
is high)
and the subsystem is not BUSY (input signal
is high), the
BUSY
ILLEGAL
BUSY
BU-61703/5 will initiate a transmit data response following trans-
mission of its status word. This entails a handshake/read cycle
for each data word transmitted, with the number of data words to
be transmitted specified by the word count field of the transmit
command word.
If
is sampled low, the Message Error bit will be set in
the SSRT's status word. No data words will be transmitted fol-
lowing transmission of the status word to an illegalized transmit
command. A low on the
input will set the busy bit in the
Status Word; in this instance, only the status word will be trans-
mitted, with no data words.
RECEIVE COMMAND (BC-TO-RT TRANSFER)
In non-burst mode, a DMA handshake will be initiated for each
data word received from the 1553 data bus. If successful, the
respective handshake will be followed by a corresponding write
cycle. A handshake timeout will not terminate transfer attempts
for the remaining data words, error flagging or Status Word trans-
mission. After the reception of a valid non-mode code receive
Command Word followed by the correct number of valid Data
Words and assuming that all words are successfully transferred
to the subsystem, a negative pulse will be asserted on the Good
Block Received (
) output. The width of this pulse is two
clock cycles.
GBR
BUSY
ILLEGAL
6
L-BRO
T/R
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
PROM / RAM / PLD
(4Kx1)
SA1
WC/MC/CWC3
WC/MC/CWC2
SA0
WC/MC/CWC4
WC/MC/CWC1
SA4
SA3
SA2
WC/MC/CWC0
I LLEG AL
A0
D0
BU - 61703 / 5
"SSRT"
(400ns max)
FIGURE 2. BU-61703/6 ILLEGALIZATION
相關(guān)PDF資料
PDF描述
BU-61740B3-102K 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128
BU-61740B3-202Q 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128
BU-61740B4-500S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128
BU-61740B4-500 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128
BU-61740B4-800 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
BU-61740B3NEW 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553 Components |μ-ACE (Micro-ACE?)
BU-61743 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553 Components |Enhanced Mini-ACE?
BU-61743F3-100 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
BU-61743F3-110 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
BU-61743F4-100 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC