參數(shù)資料
型號(hào): bq2202
廠商: Benchmark Technology Group
英文描述: SRAM Nonvolatile Controller With Reset(靜態(tài)RAM非易失性控制器單元(帶復(fù)位))
中文描述: 非易失控制器的SRAM(靜態(tài)RAM的非易失性控制器單元(帶復(fù)位)帶復(fù)位)
文件頁(yè)數(shù): 6/10頁(yè)
文件大小: 83K
代理商: BQ2202
6
AC Test Conditions
Parameter
Test Conditions
Input pulse levels
0V to 3.0V
Input rise and fall times
5ns
Input and output timing reference levels
1.5V (unless otherwise specified)
FG220102.eps
5V
960
100pF
CECON
510
Figure 3. Output Load
Sept. 1997 D
Power-Fail Control
(TA= TOPR)
Symbol
Parameter
Min.
Typ.
Max.
Unit
μ
s
μ
s
μ
s
ns
Conditions
t
PF
t
FS
t
PU
t
CED
V
CC
slew 4.75 to 4.25V
V
CC
slew 4.25 V to V
SO
V
CC
slew 4.25 to 4.75V
Chip-enable propagation delay
300
-
-
10
-
-
0
-
-
-
7
10
t
CER
Chip-enable recovery time
t
RR
-
t
RR
ms
Time during which SRAM is write-
protected after V
CC
passes V
PFD
on
power-up
t
RR
V
PFD
toRST inactive
40
80
120
ms
Time, after V
CC
becomes valid, before
RST is cleared
t
AS
Input A set up to CE
0
-
-
ns
t
WPT
Write-protect time
tR
-
tR
μ
s
Delay after V
CC
slews down past V
PFD
before SRAM is write-protected
t
R
V
PFD
toRST active
40
100
150
μ
s
Delay after V
CC
slews down past V
PFD
before RST is active
Note:
Typical values indicate operation at T
A
= 25°C, V
CC
= 5V.
bq2202
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