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參數(shù)資料
| 型號： | BM29F400T-90TC |
| 英文描述： | x8/x16 Flash EEPROM |
| 中文描述： | x8/x16閃存EEPROM |
| 文件頁數(shù)： | 13/37頁 |
| 文件大小： | 265K |
| 代理商： | BM29F400T-90TC |
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BRIGHT
Microelectronics
Inc.
BM29F400T/BM29F400B
A Winbond Company
- 13 -
Publication Release Date: December 1999
Revision A2
The Data Polling feature is only active during the Byte/Word Programming operation, Chip Erase
operation, Sector Erase Operation, or Sector Erase time-out window (see Table 7).
DQ6
Toggle Bit
The BM29F400 also features the "Toggle Bit" as a method to indicate to the host system the status of
the Internal Programming and Erase Algorithms (see Figure 4 for Toggle Bit (DQ6) flowchart.
During an Internal Programming or Erase Algorithm cycle, successive attempts to read (
OE
toggling)
data from the device will result in DQ6 toggling between one and zero. Once Internal Programming or
Erase operation is completed, DQ6 will stop toggling and valid data will be read on the next
successive attempts. During
BYTE
Programming, Toggle Bit is valid after the rising edge of the
fourth WE pulse in the four write pulse sequence. For Chip Erase, Toggle Bit is valid after the rising
edge of the sixth
WE
pulse in the six write pulse sequence. For Sector Erase, Toggle Bit is valid after
the last rising edge of the sector erase
WE
pulse. Toggle Bit is also active during sector erase time-
out window.
In Byte/Word Programming, if the sector being written to is protected, the Toggle Bit will toggle for
about 300 nS and then stop toggling without the data having changed. In Chip Erase or Sector Erase,
the device will erase all the selected sectors except for the ones that are protected. If all selected
sectors are protected, the chip will toggle the Toggle Bit for about 300 nS and then drop back into
read mode, having changed none of the data. Either CE or OE toggling will cause the DQ6 Toggle
Bit I to toggle.
DQ5
Exceeded Timing Limits
DQ5 will indicate if the Byte/Word Programming, Chip Erase, or Sector Erase time has exceeded the
specified limits (internal pulse count) of the device. Under these conditions DQ5 will produce a logical
"1". This is a failure condition which indicates that the program or erase cycle was not successfully
completed. Data Polling is the only operating function of the device under this condition. The
OE
and WE pins will control the output disable functions as described in Table 1.
If this failure condition occurs during Sector Erase operation, it specifies that particular sector is bad
and it may not be reused. However, other sectors are still functional and may continue to be used for
the program or erase operation. The device must be
RESET
to the Read mode to use other sectors
of the device. Write the Read/Reset command sequence to the device, and then execute the
Byte/Word Programming or Sector Erase command sequence. This allows the system to continue to
use the other active sectors in the device.
If this failure condition occurs during Chip Erase operation, it specifies that the entire chip is bad or
combination of sectors are bad. In so, the chip should not be reused.
If this failure condition occurs during Byte/Word Programming operation, it indicates the entire sector
containing that BYTE is bad and this sector may not be reused (other sectors are still functional and
can be reused.)
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