參數(shù)資料
型號(hào): AU5517DR2G
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/15頁(yè)
文件大?。?/td> 0K
描述: IC AMP 2 CURRENT CTRL 16-SOIC
標(biāo)準(zhǔn)包裝: 1
放大器類型: 跨導(dǎo)
電路數(shù): 2
輸出類型: 推挽式
轉(zhuǎn)換速率: 50 V/µs
增益帶寬積: 2MHz
電流 - 輸入偏壓: 400nA
電壓 - 輸入偏移: 400µV
電流 - 電源: 2.6mA
電流 - 輸出 / 通道: 650µA
電壓 - 電源,單路/雙路(±): 4 V ~ 44 V,±2 V ~ 22 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 剪切帶 (CT)
其它名稱: AU5517DR2GOSCT
Semiconductor Components Industries, LLC, 2013
June, 2013 Rev. 4
1
Publication Order Number:
NE5517/D
NE5517, NE5517A, AU5517
Dual Operational
Transconductance Amplifier
The AU5517 and NE5517 contain two current-controlled
transconductance amplifiers, each with a differential input and
push-pull output. The AU5517/NE5517 offers significant design and
performance advantages over similar devices for all types of
programmable gain applications. Circuit performance is enhanced
through the use of linearizing diodes at the inputs which enable a
10 dB signal-to-noise improvement referenced to 0.5% THD. The
AU5517/NE5517 is suited for a wide variety of industrial and
consumer applications.
Constant impedance of the buffers on the chip allow general use of
the AU5517/NE5517. These buffers are made of Darlington
transistors and a biasing network that virtually eliminate the change of
offset voltage due to a burst in the bias current IABC, hence eliminating
the audible noise that could otherwise be heard in high quality audio
applications.
Features
Constant Impedance Buffers
DVBE of Buffer is Constant with Amplifier IBIAS Change
Excellent Matching Between Amplifiers
Linearizing Diodes
High Output Signal-to-Noise Ratio
PbFree Packages are Available*
Applications
Multiplexers
Timers
Electronic Music Synthesizers
Dolby HX Systems
Current-Controlled Amplifiers, Filters
Current-Controlled Oscillators, Impedances
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
PIN CONNECTIONS
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
ORDERING INFORMATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
IABCa
Da
+INa
INa
VOa
V
INBUFFERa
VOBUFFERa
IABCb
Db
+INb
INb
VOb
V+
INBUFFERb
VOBUFFERb
N, D Packages
(Top View)
PDIP16
N SUFFIX
CASE 648
1
SOIC16
D SUFFIX
CASE 751B
1
MARKING
DIAGRAMS
NE5517yy
AWLYYWWG
xx
= AU or NE
yy
= AN or N
A
= Assembly Location
WL
= Wafer Lot
YY, Y = Year
WW = Work Week
G
= PbFree Package
xx5517DG
AWLYWW
1
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