參數(shù)資料
型號(hào): ATSAM3S8CA-CU
廠商: Atmel
文件頁(yè)數(shù): 9/57頁(yè)
文件大?。?/td> 0K
描述: IC MCU 512KB CORTEX-M3 100-BGA
標(biāo)準(zhǔn)包裝: 260
系列: SAM3S
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 64MHz
連通性: EBI/EMI,I²C,IrDA,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
17
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
Supply Monitor alarm
RTC alarm
RTT alarm
5.5.2
Wait Mode
The purpose of the wait mode is to achieve very low power consumption while maintaining the
whole device in a powered state for a startup time of less than 10 s. Current Consumption in
Wait mode is typically 15 A (total current consumption) if the internal voltage regulator is used
or 8 A if an external regulator is used.
In this mode, the clocks of the core, peripherals and memories are stopped. However, the core,
peripherals and memories power supplies are still powered. From this mode, a fast start up is
available.
This mode is entered via Wait for Event (WFE) instructions with LPM = 1 (Low Power Mode bit in
PMC_FSMR). The Cortex-M3 is able to handle external events or internal events in order to
wake-up the core (WFE). This is done by configuring the external lines WUP0-15 as fast startup
wake-up pins (refer to Section 5.7 “Fast Startup”). RTC or RTT Alarm and USB wake-up events
can be used to wake up the CPU (exit from WFE).
Entering Wait Mode:
Select the 4/8/12 MHz fast RC oscillator as Main Clock
Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR)
Execute the Wait-For-Event (WFE) instruction of the processor
Note:
Internal Main clock resynchronization cycles are necessary between the writing of MOSCRCEN
bit and the effective entry in Wait mode. Depending on the user application, waiting for
MOSCRCEN bit to be cleared is recommended to ensure that the core will not execute undesired
instructions.
5.5.3
Sleep Mode
The purpose of sleep mode is to optimize power consumption of the device versus response
time. In this mode, only the core clock is stopped. The peripheral clocks can be enabled. The
current consumption in this mode is application dependent.
This mode is entered via Wait for Interrupt (WFI) or Wait for Event (WFE) instructions with
LPM = 0 in PMC_FSMR.
The processor can be awakened from an interrupt if WFI instruction of the Cortex M3 is used, or
from an event if the WFE instruction is used to enter this mode.
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