參數(shù)資料
型號: ATSAM3S8CA-CU
廠商: Atmel
文件頁數(shù): 22/57頁
文件大?。?/td> 0K
描述: IC MCU 512KB CORTEX-M3 100-BGA
標(biāo)準(zhǔn)包裝: 260
系列: SAM3S
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 64MHz
連通性: EBI/EMI,I²C,IrDA,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
29
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
9.1.3.4
Flash Speed
The user needs to set the number of wait states depending on the frequency used:
For more details, refer to the “AC Characteristics” sub-section of the product “Electrical
Characteristics”.
9.1.3.5
Lock Regions
Several lock bits are used to protect write and erase operations on lock regions. A lock region is
composed of several consecutive pages, and each lock region has its associated lock bit.
If a locked-region’s erase or program command occurs, the command is aborted and the EEFC
triggers an interrupt.
The lock bits are software programmable through the EEFC User Interface. The command “Set
Lock Bit” enables the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
9.1.3.6
Security Bit Feature
The SAM3S8/SD8 features a security bit, based on a specific General Purpose NVM bit
(GPNVM bit 0). When the security is enabled, any access to the Flash, SRAM, Core Registers
and Internal Peripherals either through the ICE interface or through the Fast Flash Programming
Interface, is forbidden. This ensures the confidentiality of the code programmed in the Flash.
This security bit can only be enabled, through the command “Set General Purpose NVM Bit 0” of
the EEFC User Interface. Disabling the security bit can only be achieved by asserting the
ERASE pin at 1, and after a full Flash erase is performed. When the security bit is deactivated,
all accesses to the Flash, SRAM, Core registers, Internal Peripherals are permitted.
It is important to note that the assertion of the ERASE pin should always be longer than 200 ms.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during normal
operation. However, it is safer to connect it directly to GND for the final application.
9.1.3.7
Calibration Bits
NVM bits are used to calibrate the brownout detector and the voltage regulator. These bits are
factory configured and cannot be changed by the user. The ERASE pin has no effect on the cal-
ibration bits.
9.1.3.8
Unique Identifier
Each device integrates its own 128-bit unique identifier. These bits are factory configured and
cannot be changed by the user. The ERASE pin has no effect on the unique identifier.
9.1.3.9
Fast Flash Programming Interface
The Fast Flash Programming Interface allows programming the device through either a serial
JTAG interface or through a multiplexed fully-handshaked parallel port. It allows gang program-
ming with market-standard industrial programmers.
Table 9-1.
Lock bit number
Product
Number of lock bits
Lock region size
SAM3S8/SD8
16
32 kbytes (128 pages)
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