參數(shù)資料
型號: ATF16V8B-15SU
廠商: Atmel
文件頁數(shù): 7/26頁
文件大?。?/td> 0K
描述: IC PLD EE 15NS 20-SOIC
標準包裝: 37
系列: 16V8
可編程類型: EE PLD
宏單元數(shù): 8
輸入電壓: 5V
速度: 15ns
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 20-SOIC W
包裝: 管件
產(chǎn)品目錄頁面: 610 (CN2011-ZH PDF)
15
7707F–AVR–11/10
AT90USB82/162
4.8.1
Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum.
After five clock cycles the program vector address for the actual interrupt handling routine is exe-
cuted. During these five clock cycle period, the Program Counter is pushed onto the Stack. The
vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If an
interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before
the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt exe-
cution response time is increased by five clock cycles. This increase comes in addition to the
start-up time from the selected sleep mode.
A return from an interrupt handling routine takes three clock cycles. During these three clock
cycles, the Program Counter (three bytes) is popped back from the Stack, the Stack Pointer is
incremented by three, and the I-bit in SREG is set.
Assembly Code Example
sei
; set Global Interrupt Enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
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