參數(shù)資料
型號(hào): AT32AP7001-ALUT
廠商: Atmel
文件頁(yè)數(shù): 44/65頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT AVR32 208-LQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 180
系列: AVR®32 AP7
核心處理器: AVR
芯體尺寸: 32-位
速度: 150MHz
連通性: EBI/EMI,I²C,MMC,PS2,SPI,SSC,UART/USART,USB
外圍設(shè)備: AC'97,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 90
程序存儲(chǔ)器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: D/A 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-LQFP
包裝: 托盤(pán)
配用: ATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMR
ATNGW100-ND - KIT AVR32 NETWORK GATEWAY
ATSTK1000-ND - KIT STARTER FOR AVR32AP7000
49
32015G–AVR32–09/09
AT32AP7001
8.8
PICO Instructions
8.8.1
PICO Instructions Nomenclature
8.8.1.1
Registers and Operands
R{d, s, …}
The uppercase ‘R’ denotes a 32-bit (word) register.
Rd
The lowercase ‘d’ denotes the destination register number.
Rs
The lowercase ‘s’ denotes the source register number.
Rb
The lowercase ‘b’ denotes the base register number for indexed addressing modes.
Ri
The lowercase ‘i’ denotes the index register number for indexed addressing modes.
Rp
The lowercase ‘p’ denotes the pointer register number.
IN{x, y, z}
The uppercase ‘IN’ denotes a pixel in the INPIXn registers.
INx
The lowercase ‘x’ denotes the first input pixel number for the PICO operation instructions.
INy
The lowercase ‘y’ denotes the second input pixel number for the PICO operation instructions.
INz
The lowercase ‘z’ denotes the third input pixel number for the PICO operation instructions.
OUTd
The uppercase ‘OUT’ denotes a pixel in the OUTPIXn registers.
OUTd
The lowercase ‘d’ denotes the destination pixel number for the PICO operation instructions.
Pr
PICO register. See Section 8.7.1 ”Register File” on page 31 for a complete list of registers.
PrHi:PrLo
PICO register pair. Only register pairs corresponding to valid coprocessor double registers are valid.
E.g. INPIX1:INPIX2 (cr1:cr0). The low part must correspond to an even coprocessor register number
n and the high part must then correspond to coprocessor register n+1. See Table 8-1 on page 31
for a mapping between PICO register names and coprocessor register numbers.
PC
Program Counter, equal to R15
LR
Link Register, equal to R14
SP
Stack Pointer, equal to R13
PICORegList
Register List used in the picoldm and picostm instructions. See instruction description for which
register combinations are allowed in the register list.
disp
Displacement
sa
Shift amount
[i]
Denotes bit i in a immediate value. Example: imm6[4] denotes bit 4 in an 6-bit immediate value.
[i:j]
Denotes bit i to j in an immediate value.
Some instructions access or use doubleword operands. These operands must be placed in two consecutive register
addresses where the first register must be an even register. The even register contains the least significant part and
the odd register contains the most significant part. This ordering is reversed in comparison with how data is
organized in memory (where the most significant part would receive the lowest address) and is intentional.
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