ProASICPLUS Flash Family FPGAs v5.9 2-1 General Description Routing Resources
參數(shù)資料
型號： APA600-CGS624B
廠商： Microsemi SoC
文件頁數(shù)： 13/178頁
文件大?。?/td> 0K
描述： IC FPGA PROASIC+ 600K 624-CGA
標準包裝： 1
系列： ProASICPLUS
RAM 位總計： 129024
輸入/輸出數(shù)： 440
門數(shù)： 600000
電源電壓： 2.3 V ~ 2.7 V
安裝類型： 通孔
封裝/外殼： 624-BCCGA
供應(yīng)商設(shè)備封裝： 624-CCGA（32.5x32.5）
ProASICPLUS Flash Family FPGAs
v5.9
2-1
General Description
Routing Resources
The routing structure of ProASICPLUS devices is designed
to provide high performance through a flexible four-
level hierarchy of routing resources: ultra-fast local
resources, efficient long-line resources, high-speed, very
long-line
resources,
and
high
performance
global
networks.
The ultra-fast local resources are dedicated lines that
allow the output of each tile to connect directly to every
input of the eight surrounding tiles (Figure 2-1).
The efficient long-line resources provide routing for
longer distances and higher fanout connections. These
resources vary in length (spanning 1, 2, or 4 tiles), run
both vertically and horizontally, and cover the entire
ProASICPLUS device (Figure 2-2 on page 2-2). Each tile can
drive signals onto the efficient long-line resources, which
can in turn access every input of every tile. Active buffers
are inserted automatically by routing software to limit
the loading effects due to distance and fanout.
The high-speed, very long-line resources, which span the
entire device with minimal delay, are used to route very
long or very high fanout nets. (Figure 2-3 on page 2-3).
The high-performance global networks are low-skew,
high fanout nets that are accessible from external pins or
from internal logic (Figure 2-4 on page 2-4). These nets
are typically used to distribute clocks, resets, and other
high fanout nets requiring a minimum skew. The global
networks are implemented as clock trees, and signals can
be introduced at any junction. These can be employed
hierarchically with signals accessing every input on all
tiles.
Figure 2-1 Ultra-Fast Local Resources
L
Inputs
Output
Ultra-Fast
Local Lines
(connects a tile to the
adjacent tile, I/O buffer,
or memory block)
L
LL
相關(guān)PDF資料
PDF描述
93AA56C-I/P IC EEPROM 2KBIT 3MHZ 8DIP
93C66CT-I/ST IC EEPROM 4KBIT 3MHZ 8TSSOP
93LC56A-E/SN IC EEPROM 2KBIT 3MHZ 8SOIC
EP2S130F1020I4N IC STRATIX II FPGA 130K 1020FBGA
EP4SE530H35C4N IC STRATIX IV FPGA 530K 1152HBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
APA600-CGS624M 制造商:Microsemi Corporation 功能描述:FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um Technology 2.5V 624-Pin CCGA 制造商:Microsemi Corporation 功能描述:APA600-CGS624M - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 440 I/O 624CCGA
APA600-CQ208B 功能描述:IC FPGA PROASIC+ 600K 208-CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASICPLUS 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75）
APA600-CQ208M 制造商:Microsemi Corporation 功能描述:FPGA PROASICPLUS 600K GATES 180MHZ 0.22UM 2.5V 208CQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA PROASIC+ 600K 208CQFP 制造商:Microsemi Corporation 功能描述:IC FPGA 158 I/O 208CQFP
APA600-CQ352B 功能描述:IC FPGA PROASIC+ 600K 352-CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASICPLUS 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75）
APA600-CQ352M 制造商:Microsemi Corporation 功能描述:FPGA PROASICPLUS 600K GATES 180MHZ 0.22UM 2.5V 352CQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 248 I/O 352CQFP
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*