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參數(shù)資料
| 型號(hào)： | AN207 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | 12-ns DG611 Switch Family Combines Benefits of CMOS and DMOS Technologies |
| 中文描述： | 12納秒DG611開(kāi)關(guān)系列組合的優(yōu)點(diǎn)CMOS和DMOS技術(shù) |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | AN207 |
FIGURE 9.
High-Speed 8-Channel Multiplexer Capable of 3-MHz Sampling Rates
DG611
DG611
S
1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
V
OUT
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
CD74HC138
A
0
E
1
E
2
E
3
A
1
A
2
FIGURE 10.
High-Speed Open-Loop Sample-and-Hold
1
/
2
DG611
Input Buffer
LF356
IN
S
D
Output Buffer
C
650 pF Polystyrene
Sample/Hold
Analog
Input
4 V Output
to A/D
+5 V
–5 V
+12 V
CLC111
AN207
Vishay Siliconix
www.vishay.com FaxBack 408-970-5600
6-6
Document Number: 70605
03-Aug-99
Inputs
On
Enable
Address
E
3
E
2
E
1
A
2
A
1
A
0
Switch
X
X
H
X
X
X
None
L
X
X
X
X
X
None
X
H
X
X
X
X
None
H
L
L
L
L
L
1
H
L
L
L
L
H
2
H
L
L
L
H
L
3
H
L
L
L
H
H
4
H
L
L
H
L
L
5
H
L
L
H
L
H
6
H
L
L
H
H
L
7
H
L
L
H
H
H
8
H = High Level, L = Low Level
X = Don’t Care
Replacing into equation (1):
f
S
1
24 pF
8(9
18
30 ns)
3.7 MHz
An added benefit of this circuit is its improvement of overall
accuracy by isolating the analog and (usually noisy) digital
grounds. This is because the DG611 CMOS input stage has a
high noise immunity, allowing for differences of up to
between the analog and digital grounds.
1 V
Sample-and-Hold Circuits
Data acquisition systems use sample-and-holds to “freeze”
fast changing analog signals so they can be presented to an
A/D converter for digitization. Accurately acquiring and holding
the signal amplitude is critical to system performance.
Figure 10 shows a basic open-loop sample-and-hold circuit.
When the switch opens, a sample is stored on the hold
capacitor.
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