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參數(shù)資料
| 型號： | AMIS30585C5852RG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 16/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MODEM S-FSK HALFDUPLEX 28PLCC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 波特率： | 14.4k |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
AMIS30585
http://onsemi.com
8
Operating Characteristics
Standard compliance: compliance to IEC 133451
(SFSK profile) and IEC 1334432.
Main modem characteristics are given in Table 4.
Table 4. OPERATING CHARACTERISTICS
Parameter
Value
Unit
Positive supply voltage
Negative supply voltage
3.0 to 3.6
0.7 to + 0.3
V
Max peak output level
1, 2
Vp
HD2
060
dB
HD3
60
dB
ALC Steps
3
dB
ALC Range
(0...21)
dB
Maximum input signal
1, 15
Vp
Input impedance
100
Kohm
Input sensitivity
0.4
mV
AGC steps
6
dB
AGC range
(0...+42)
dB
Maximum 50 Hz variation
0, 1
Hz/s
Data rate
300/360 (Note 7)
600/720 (Note 7)
1200/1440 (Note 7)
baud
Programmable carrier
(Note 6)
Frequency band
Frequency minimum
9
kHz
Frequency maximum
95
kHz
Frequency deviation
between pairs
>10
kHz
Dynamic range
40 (Note 1)
60 (Note 2)
80 (Note 3)
dB
Narrow band interfere
BER (Note 4)
10E5
Impulsive noise BER
(Note 5)
10E5
1. FER = 0 percent.
2. FER = 0.3 percent.
3. FER = 8.0 percent.
4. Signal between 60 dB and 0 dB interference signal level is
30 dB above signal level between 20 kHz and 95 kHz.
5. Input at 40 dB, duty cycle between 10 – 50 percent pulse
noise frequency between 100 to 1000 Hz. BER: Bit error rate
FER: Frame error rate (1 frame is 288 bits)
6. Carriers frequency is programmable by steps of 10 Hz.
7. 60 Hz mains frequency.
BACKEND INTERFACES
Serial Communication Interface (SCI)
The SCI allows asynchronous communication. It can
communicate with a UART = Universal Asynchronous
Receiver Transmitter, ACIA = Asynchronous Communication
Interface Adapter and all other chips that employ standard
asynchronous
serial
communication.
The
serial
communication interface allows only half duplex
communication.
Figure 10. Connection to the
Application Microcontroller
SCI Physical Layer Description
The following pins control the serial communication
interface.
TXD: Transmit data output. It is the data output of the
AMIS30585 and the input of the base micro.
RXD: Receive data input. It is the data input of the
AMIS30585 and the output of the base micro.
BR0,BR1: Baud rate selection inputs. These pins are
externally strapped to a value or controlled by the external
base microcontroller.
Table 5. BR1, BR0 BAUD RATES
BR1
BR0
SCI Baud Rate
0
4800
0
1
9600
1
0
19200
1
38400
Typical External Components
The schematic showing the external components is shown
in Figure 4 – a typical application.
Supply Decoupling
For correct functioning the VDDA and VSSA should be
decoupled as close as possible on the PCB by a 100 nF
±10
percent ceramic decoupling capacitor CDA.
For correct functioning the VDD and VSS should be
decoupled as close as possible on the PCB by a 100 nF
±10
percent ceramic decoupling capacitor CDD.
For correct functioning the REF_OUT and VSSA should
be decoupled as close as possible on the PCB by a 1
mF ±10
percent ceramic decoupling capacitor CDREF.
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