參數(shù)資料
型號： AM79C930VCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
中文描述： 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： TQFP-144
文件頁數(shù)： 80/161頁
文件大?。?/td> 691K
代理商： AM79C930VCW
AMD
P R E L I M I N A R Y
80
Am79C930
SIR5: I/O Data Port B (IODPB)
This register is a system interface I/O address alias of
I/O Data Port A.
Bit
Name
Reset Value
Description
7:0
IODPB[7:0]
–
Aliased to I/O Data Port A.
SIR6: I/O Data Port C (IODPC)
This register is a system interface I/O address alias of
I/O Data Port A.
Bit
Name
Reset Value
Description
7:0
IODPC[7:0]
–
Aliased to I/O Data Port A.
SIR7: I/O Data Port D (IODPD)
This register is a system interface I/O address alias of
I/O Data Port A.
Bit
Name
Reset Value
Description
7:0
IODPD[7:0]
–
Aliased to I/O Data Port A.
MAC Interface Registers (MIR Space)
The MAC Interface Unit Register (MIR) space contains
16 registers which are used by the firmware to allow
communication between the firmware (MAC layer) and
the device driver. This register set also contains the
power down registers. These registers are only accessi-
ble through the 80188 core; they are inaccessible from
the system interface.
MIR0: Processor Interface Register (PIR)
This register is used to communicate to and from the
driver at the system interface.
Bit
Name
Reset Value
Description
7
SIDA
0
System Interface Direct Access. When SIDA is set to 1, then the
system interface side of the BIU is in direct memory access mode,
such that system interface access cycles will have direct access to
the Am79C930 memory interface. This mode should only be in-
voked if the 80188 will be placed into HALT mode by an appropriate
instruction within the 80188 firmware during the time that SIDA is
set to 1. When SIDA is reset to 0, then system interface accesses to
the Am79C930 memory interface will be translated by the internal
BIU arbitration state machine.
Embedded Controller Memory Resource Mapping Scheme. When
ECMRMS is set to 1, the top 96K of Flash memory is mapped to
80188 memory locations 8000h to 1FFFFh. All of Flash memory is
still available at the “normal” locations E0000h to FFFFFh. When
ECMRMS is reset to 0, Flash memory is mapped only to locations
E0000h to FFFFFh.
System Power Down Request. SPDREQ will indicate a 1 when the
device driver writes a 1 to the PCMCIA Power Down Request bit in
the PCMCIA Card Configuration and Status Register or when the
device driver writes a 1 to the SIR3 ISAPWRDWN bit. When
SPDREQ is a 1, an interrupt to the 80188 will be generated.
SPDREQ will become cleared when the 80188 core writes a 1
to SPDREQ.
6
ECMRMS
0
5
SPDREQ
0
相關(guān)PDF資料
PDF描述
AM79C940VCW Media Access Controller for Ethernet (MACE)
AM79C940 Media Access Controller for Ethernet (MACE)
AM79C940JCW Media Access Controller for Ethernet (MACE)
AM79C940KCW Media Access Controller for Ethernet (MACE)
AM79C960 PCnetTM-ISA Single-Chip Ethernet Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C940 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE)
AM79C940_00 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE⑩)
AM79C940-16/25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
AM79C940-16JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C940-25JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*