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| 型號(hào)： | Am7968-125LKC |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| 中文描述： | TAXIchip集成電路（透明異步Xmitter，接收器接口） |
| 文件頁(yè)數(shù)： | 89/127頁(yè) |
| 文件大?。?/td> | 730K |
| 代理商： | AM7968-125LKC |
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AMD
85
TAXIchip Integrated Circuits Technical Manual
output data at the same time This also guarantees that the CNB on the first Receiver
goes active (HIGH) within 2 gate delays + 20 ns after it goes LOW. This leaves enough
time for the first Receiver to capture the (R+1)th byte of data.
Figure 7-10
T AX I Rec eiver—Casc aded In Auto-Repeat Configuration.
Configuration 2
SERIN +
SERIN -
12330E-32
C
D
CNB
IGM
C
D
CNB
IGM
C
D
CNB
IGM
C
D
CNB
IGM
Figure 7-11
T AX I Rec eiver—Casc aded in Auto-Repeat Configuration.
Configuration 3
SERIN+
SERIN–
CNB
IGM
DSTRB
CSTRB
CNB
IGM
DSTRB
CSTRB
CNB
IGM
DSTRB
CSTRB
CNB
IGM
DSTRB
CSTRB
12330E-33
In practice, all the AND gates are not required. Using the above equation for X we can
calculate a value of R1 for which X is less than 1 byte period at the appropriate fre-
quency of operation. Then if the number of receivers to be cascaded is greater than R1,
an AND gate is needed for every (R1+1)th Receiver in cascade. The other receivers can
be directly connected as shown in Figure 7-11.
S ync s in Auto-Repeat Configuration and Rec overing from Errors
A Sync in Auto-Repeat Configuration acts much like a Sync in Normal Cascade mode. It
resets all the Receivers and their IGMs so the upstream (Primary) Receiver receives the
next non Sync byte of data. This remains as the method of recovering from byte framing
errors.
7.4 Unbalanc ed Configuration (Am7968/Am7969-125 Only)
In reality there is no difference in connection between balanced and Unbalanced
Configurations. The name only indicates that the number of Transmit bytes and the
number of Receive bytes are unequal.
The TAXI Receivers do not care how many data bytes the Transmitter is sending to
them. One data byte can be transmitted to several Receivers. The only limitation here is
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Am7969-125LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7968-175LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7969-175LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125VB3A | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969-125VB3A | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM7968-125LMC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-125PCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-125VB3A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125VBXA | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
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