參數(shù)資料
型號: AM49DL3208GB70FS
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA69
封裝: 8 X 10 MM, FBGA-69
文件頁數(shù): 4/61頁
文件大?。?/td> 904K
代理商: AM49DL3208GB70FS
10
Am49DL3208G
March 12, 2004
ADV ANCE
I N FO RMAT I O N
Table 1.
Device Bus Operations
Legend: L = Logic Low = V
IL, H = Logic High = VIH, VID = 11.5–12.5 V, X = Don’t Care, SADD = Flash Sector Address, AIN =
Address In, D
IN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
IL, CE1#s = VIL and CE2s = VIH at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL , the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed.
If WP#/ACC = V
ACC (9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
IL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
HH, all sectors will be unprotected.
FLASH DEVICE BUS OPERATIONS
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE#f and OE# pins to V
IL. CE#f is the power
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE#
should remain at V
IH . The C I Of pin determines
whether the device outputs array data in words or
bytes.
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
Operation
(Notes 1, 2)
CE#f
CE1#s
CE2s OE# WE#
Addr.
LB#s UB#s RESET#
WP#/ACC
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
L
HX
LH
A
IN
XX
H
L/H
D
OUT
D
OUT
XL
Write to Flash
L
HX
HL
A
IN
XX
H
D
IN
D
IN
XL
Standby
V
CC ±
0.3 V
HX
XX
X
V
CC ±
0.3 V
H
High-Z
XL
Output Disable
L
H
HH
X
L
X
H
L/H
High-Z
HH
X
L
Flash Hardware
Reset
X
HX
X
L
L/H
High-Z
XL
Sector Protect
L
HX
HL
SADD,
A6 = L,
A1 = H,
A0 = L
XX
V
ID
L/H
D
IN
X
XL
Sector Unprotect
L
HX
HL
SADD,
A6 = H,
A1 = H,
A0 = L
XX
V
ID
D
IN
X
XL
Temporary Sector
Unprotect
X
HX
XX
X
V
ID
D
IN
High-Z
XL
Read from PSRAM
H
L
H
L
H
A
IN
LL
HX
D
OUT
D
OUT
HL
High-Z
D
OUT
LH
D
OUT
High-Z
Write to PSRAM
H
L
H
X
L
A
IN
LL
HX
D
IN
D
IN
HL
High-Z
D
IN
LH
D
IN
High-Z
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