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參數(shù)資料
| 型號： | AM49BDS640AHD8I |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA89 |
| 封裝： | 10 X 8 MM, FBGA-89 |
| 文件頁數(shù)： | 58/84頁 |
| 文件大小： | 763K |
| 代理商： | AM49BDS640AHD8I |
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56
Am49BDS640AH
December 5, 2003
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Note:
Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY with valid data.
1) Address 3Eh or offset by a multiple of 64 (40h)
2) Address is 3Fh or offset by a multiple of 64 (40h)
Figure 26.
Standard Handshake Burst Suspend at address 3Eh/3Fh (with 1 Access CLK)
Note:
Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY with valid data.
1) Device crosses a page boundary prior to t
RCC
2) Device neither crosses a page boundary nor latches a new address prior to t
RCC
Figure 27.
Read Cycle for Continuous Suspend
Addresses(1)
A(3E)
AVD#
CLK
1
2
3
4
5
6
7
x+1
x+2
x+3
x+4
x+5
x+6
x
OE#
Data(1)
Addresses(2)
Data(2)
RDY(2)
(Odd)
RDY(1)
(Even)
D(3E)
D(3F)
D(41)
D(40)
D(42)
D(40)
D(42)
D(41)
D(43)
Suspend
8
Resume
t
OES
t
ACC
t
RACC
t
CKZ
t
OES
t
OES
t
CKA
A(3F)
D(3F)
D(3F)
9
t
RACC
D(40)
t
RACC
t
RACC
t
RACC
t
RACC
Addresses
A(n)
AVD#
Data(2)
CE#
RDY
D(n)
t
OES
t
OES
t
CKA
t
RACC
t
RCC
t
RCC
1
2
3
4
5
6
7
x+1
x+2
x+3
x+4
x+5
x+6
x
x+7
x+8
OE#
Data(1)
t
ACC
D(40)
D(3F)
D(n)
D(n+1)
D(n+2)
D(3F)
D(3F)
CLK
Suspend
Resume
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| AM49BDS640AHD9I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
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| AM49BDS640AHE9I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
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