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參數(shù)資料
| 型號： | Am29PDL128G70 |
| 廠商： | Spansion Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO Control |
| 中文描述： | 128兆位（8米× 16位/ 4米× 32位），3.0伏的CMOS只，同步讀/寫閃存與VersatileIO控制記憶 |
| 文件頁數(shù)： | 61/69頁 |
| 文件大小： | 1181K |
| 代理商： | AM29PDL128G70 |
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60
Am29PDL128G
July 29, 2002
P R E L I M I N A R Y
AC CHARACTERISTICS
OE#
CE#
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
RY/BY#
Note:
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status
read cycle, and array data read cycle
Figure 21.
Toggle Bit Timings (During Embedded Algorithms)
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle
DQ2 and DQ6.
Figure 22.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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