
Am29LV800T/Am29LV800B
19
P R E L I M I N A R Y
device is driving status information on DQ7 at one in-
stant of time and then that byteUs valid data at the next
instant of time. Depending on when the system sam-
ples the DQ7 output, it may read the status or valid
data. Even if the device has completed the Embedded
Algorithm operations and DQ7 has valid data, DQ0–
DQ6 may still provide write operation status. The valid
data on DQ0–DQ7 can be read on the next successive
read attempt.
The DATA Polling feature is only active during the Em-
bedded Programming Algorithm, Embedded Erase Al-
gorithm, Erase Suspend, erase suspend-program
mode, or sector erase time-out (see Table 7).
If the user attempts to write to a protected sector,
DATA Polling will be activated for about 1
μ
s; the de-
vice will then return to read mode, with data from the
protected sector unchanged. If the user attempts to
erase a protected sector, Toggle Bit will be activated
for about 50
μ
s; the device will then return to read
mode, without having erased the protected sector.
See Figure 18 for the DATA Polling timing specifications
and diagrams.
DQ6: Toggle Bit
The Am29LV800 also features a “Toggle Bit” as a
method to indicate to the host system whether the em-
bedded algorithms are in progress or completed.
During an Embedded Program or Erase Algorithm,
successive attempts to read data from the device will
result in DQ6 toggling between one and zero. Once the
Embedded Program or Erase Algorithm is completed,
DQ6 will stop toggling and valid data can be read on
the next successive attempts. During programming, the
Toggle Bit is valid after the rising edge of the fourth WE
pulse in the four-write-pulse sequence. During Chip
erase, the Toggle Bit is valid after the rising edge of the
sixth WE pulse in the six-write-pulse sequence. During
Sector erase, the Toggle Bit is valid after the last rising
edge of the sector erase WE pulse. The Toggle Bit is
active during the Sector Erase time-out.
Either CE or OE toggling will cause DQ6 to toggle. If the
user attempts to write to a protected sector, DATA Polling
will be activated for about 1
μ
s; the device will then return
to read mode, with data from the protected sector un-
changed. If the user attempts to erase a protected sec-
tor, Toggle Bit will be activated for about 50
μ
s; the
device will then return to read mode, without having
erased the protected sector.
DQ5: Exceeded Timing Limits
DQ5 will indicate if the program or erase time has ex-
ceeded the specified limits (internal pulse count).
Under these conditions, DQ5 will produce a ‘1’ indicat-
ing that the program or erase cycle was not success-
fully completed. Write operation status and reset
command are the only operating functions under this
condition. The device will draw active power under this
condition.
The DQ5 failure condition will also appear if the user at-
tempts to write a data ‘1’ to a bit that has already been
programmed to a data ‘0’. In this case, the DQ5 failure
condition is not guaranteed to happen, since the device
was incorrectly used. Please note that programming a
data ‘0’ to a data ‘1’ should never be attempted, and
only erasure should be used for this purpose. If pro-
gramming to a data ‘1’ is attempted, the device should
be reset.
If the DQ5 failure condition is observed while in Sector
Erase mode (that is, exceeded timing limits), then DQ2
can be used to determine which sector had the prob-
lem. This is especially useful when multiple sectors
have been loaded for erase.
DQ3: Sector Erase Timer
After the completion of the initial Sector Erase com-
mand sequence, the Sector Erase time-out will begin.
DQ3 will remain low until the time-out is complete.
DATA Polling (DQ7) and Toggle Bit (DQ6) are also valid
after the first sector erase command sequence.
If DATA Polling or the Toggle Bit indicates the device
has been written with a valid Sector Erase command,
DQ3 may be used to determine if the sector erase timer
window is still open. If DQ3 is high (‘1’), the internally
controlled erase cycle has begun; attempts to write
subsequent commands to the device will be ignored
until the erase operation is completed as indicated by
the DATA Polling or Toggle Bit. If DQ3 is low (‘0’), the
device will accept additional sector erase commands.
To be certain the command has been accepted, the
software should check the status of DQ3 following each
Sector Erase command. If DQ3 was high on the sec-
ond status check, the command may not have been ac-
cepted.
It is recommended that the user guarantee the time be-
tween sector erase command writes be less than 80
μ
s
by disabling the processor interrupts just for the dura-
tion of the Sector Erase (30h) commands. This ap-
proach will ensure that sequential sector erase
command writes will be written to the device while the
sector erase timer window is still open.
DQ2: Toggle Bit 2
This toggle bit, along with DQ6, can be used to deter-
mine whether the device is in the Embedded Erase Al-
gorithm or in Erase Suspend.
Successive reads from the erasing sector will cause
DQ2 to toggle during the Embedded Erase Algorithm.
If the device is in the erase suspend-read mode, suc-
cessive reads from the erase-suspended sector will
cause DQ2 to toggle. When the device is in the erase
suspend-program mode, successive reads from the
byte address of the non-erase suspended sector will