參數(shù)資料
型號: AM29LV800DT-120ED
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 1800pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R (BX); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: 100% Tin (Sn); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: P Failure Rate
中文描述: 512K X 16 FLASH 3V PROM, 120 ns, PDSO48
封裝: LEAD FREE, MO-142DD, TSOP-48
文件頁數(shù): 45/51頁
文件大?。?/td> 1628K
代理商: AM29LV800DT-120ED
43
Am29LV800D
Am29LV800D_00_A4_E January 21, 2005
P R E L I M I N A R Y
Erase and Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 3.0 V V
CC
, 1,000,000 cycles.
Additionally, programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V
CC
= 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
bytes program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
command. See Table 5 for further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles.
Latchup Characteristics
Includes all pins except V
CC
. Test conditions: V
CC
=
3.0 V, one pin at a time.
TSOP and SO Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
Data Retention
Parameter
Typ (Note
1)
Max (Note 2)
Unit
Comments
Sector Erase Time
1
10
s
Excludes 00h programming
prior to erasure
Chip Erase Time
14
s
Byte Programming Time
8
300
μs
Excludes system level
overhead (Note 5)
Word Programming Time
16
360
μs
Chip Programming
Time
(Note 3)
Byte Mode
8.4
25
s
Word Mode
5.8
17
s
Description
Min
Max
Input voltage with respect to V
SS
on all pins except I/O pins
(including A9, OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to V
SS
on all I/O pins
–1.0 V
V
CC
+ 1.0 V
V
CC
Current
–100 mA
+100 mA
Parameter
Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
6
7.5
pF
C
OUT
Output Capacitance
V
OUT
= 0
8.5
12
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
7.5
9
pF
Parameter
Test
Conditions
Min
Unit
Minimum Pattern Data Retention Time
150
°
C
10
Years
125
°
C
20
Years
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