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參數(shù)資料
| 型號(hào)： | AM29BDS64HE9VFI |
| 廠商： | Spansion Inc. |
| 英文描述： | 128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 128或64兆位（8米或4個(gè)M x 16位）的CMOS 1.8伏，只有同時(shí)讀/寫，突發(fā)模式閃存 |
| 文件頁(yè)數(shù)： | 75/89頁(yè) |
| 文件大?。?/td> | 913K |
| 代理商： | AM29BDS64HE9VFI |
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May 10, 2006 27024B3
Am29BDS128H/Am29BDS640H
73
D A T A S H E E T
AC CHARACTERISTICS
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.
2. “In progress” and “complete” refer to status of program operation.
3. Amax–A12 are don’t care during command sequence unlock cycles.
4. Addresses are latched on the first of either the rising edge of AVD# or the active edge of CLK.
5. Either CE# or AVD# is required to go from low to high in between programming command sequences.
6. The Synchronous programming operation is dependent of the Set Device Read Mode bit in the Configuration Register. The
Configuration Register must be set to the Synchronous Read Mode.
Figure 37.
Synchronous Program Operation Timings: CLK Latched Addresses
OE#
CE#f
Data
Addresses
AVD#
WE#
CLK
V
CC
f
555h
PD
t
WC
t
WPH
t
WP
PA
t
VCS
t
DH
t
CH
In
Progress
t
WHWH1
VA
Complete
VA
Program Command Sequence (last two cycles)
Read Status Data
t
DS
t
AVDP
A0h
t
AS
t
CAS
t
AH
t
AVCH
t
CSW
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