參數(shù)資料
型號(hào)： AM29BDS643D
廠商： Advanced Micro Devices, Inc.
英文描述： 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
中文描述： 64兆位（4個(gè)M x 16位）的CMOS 1.8伏，只有同時(shí)讀/寫，突發(fā)模式閃存
文件頁(yè)數(shù)： 18/46頁(yè)
文件大?。?/td> 693K
代理商： AM29BDS643D
18
Am29BDS643D
P R E L I M I N A R Y
Reset Command
Writing the reset command resets the banks to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the
sequence cycles in an erase command sequence
before erasing begins. This resets the bank to which
the system was writing to the read mode. Once erasure
begins, however, the device ignores reset commands
until the operation is complete.
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the bank to
which the system was writing to the read mode. If the
program command sequence is written to a bank that
is in the Erase Suspend mode, writing the reset
command returns that bank to the erase-suspend-read
mode. Once programming begins, however, the device
ignores reset commands until the operation is com-
plete.
The reset command may be written between the
sequence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must
be written to return to the read mode. If a bank entered
the autoselect mode while in the Erase Suspend mode,
writing the reset command returns that bank to the
erase-suspend-read mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the banks to the
read mode (or erase-suspend-read mode if that bank
was in Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes,
and determine whether or not a sector is protected.
Table 4 shows the address and data requirements. The
autoselect command sequence may be written to an
address within a bank that is either in the read or
erase-suspend-read mode. The autoselect command
may not be written while the device is actively program-
ming or erasing in the other bank.
The autoselect command sequence is initiated by first
writing two unlock cycles. This is followed by a third
write cycle that contains the bank address and the
autoselect command. The bank then enters the
autoselect mode. The system may read at any address
within the same bank any number of times without ini-
tiating another autoselect command sequence. The fol-
lowing table describes the address requirements for
the various autoselect functions, and the resulting data.
BA represents the bank address, and SA represents
the sector address. The device ID is read in three
cycles.
The system must write the reset command to return to
the read mode (or erase-suspend-read mode if the
bank was previously in Erase Suspend).
Program Command Sequence
Programming is a four-bus-cycle operation. The
program command sequence is initiated by writing two
unlock write cycles, followed by the program set-up
command. The program address and data are written
next, which in turn initiate the Embedded Program
algorithm. The system is
not
required to provide further
controls or timings. The device automatically provides
internally generated program pulses and verifies the
programmed cell margin. Table 4 shows the address
and data requirements for the program command
sequence.
When the Embedded Program algorithm is complete,
that bank then returns to the read mode and addresses
are no longer latched. The system can determine the
status of the program operation by monitoring DQ7 or
DQ6/DQ2. Refer to the Write Operation Status section
for information on these status bits.
Any commands written to the device during the
Embedded Program Algorithm are ignored.
Note that a
hardware reset
immediately terminates the program
operation. The program command sequence should be
reinitiated once that bank has returned to the read
mode, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from “0” back to a “1.”
Attempting to do so may cause
that bank to set DQ5 = 1, or cause the DQ7 and DQ6
status bit to indicate the operation was successful.
However, a succeeding read will show that the data is
still “0.” Only erase operations can convert a “0” to a
“1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to prima-
rily program to a bank faster than using the standard
Description
Address
Read Data
Manufacturer ID
(BA) + 00h
0001h
Device ID, Word 1
(BA) + 01h
227Eh
Device ID, Word 2
(BA) + 0Eh
2202h
Device ID, Word 3
(BA) + 0Fh
2200h
Sector Block
Lock/Unlock
(SA) + 02h
0001 (locked),
0000 (unlocked)
Handshaking
Enabled
(BA) + 03h
40h
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