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| 型號(hào)： | AM29BDD160GB17DPBE |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動(dòng)，同步讀/寫(xiě)閃存 |
| 文件頁(yè)數(shù)： | 28/79頁(yè) |
| 文件大小： | 1368K |
| 代理商： | AM29BDD160GB17DPBE |
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26
Am29BDD160G
June 7, 2006
Table 11
.
S
ector Protect
i
on
S
cheme
s
T
ab
le 11 cont
ai
n
s
a
ll po
ssib
le com
bi
n
a
t
i
on
s
of the
DYB, PPB,
a
nd PPB lock rel
a
t
i
ng to the
s
t
a
t
us
of the
s
ector
.
In
su
mm
a
ry,
i
f the PPB
is
s
et,
a
nd the PPB lock
is
s
et,
the
s
ector
is
protected
a
nd the protect
i
on c
a
n not
b
e
removed
u
nt
i
l the next power cycle cle
a
r
s
the PPB
lock
.
If the PPB
is
cle
a
red, the
s
ector c
a
n
b
e dyn
a
m
i
-
c
a
lly locked or
u
nlocked
.
The DYB then control
s
whether or not the
s
ector
is
protected or
u
nprotected
.
If the
us
er
a
ttempt
s
to progr
a
m or er
as
e
a
protected
s
ector, the dev
i
ce
i
gnore
s
the comm
a
nd
a
nd ret
u
rn
s
to
re
a
d mode
.
A progr
a
m comm
a
nd to
a
protected
s
ector
en
ab
le
s
s
t
a
t
us
poll
i
ng for
a
pprox
i
m
a
tely 1
μs
b
efore
the dev
i
ce ret
u
rn
s
to re
a
d mode w
i
tho
u
t h
a
v
i
ng mod
i
-
f
i
ed the content
s
of the protected
s
ector
.
An er
as
e
comm
a
nd to
a
protected
s
ector en
ab
le
s
s
t
a
t
us
poll
i
ng
for
a
pprox
i
m
a
tely 50
μs
a
fter wh
i
ch the dev
i
ce ret
u
rn
s
to re
a
d mode w
i
tho
u
t h
a
v
i
ng er
as
ed the protected
s
ec-
tor
.
The progr
a
mm
i
ng of the DYB, PPB,
a
nd PPB lock for
a
g
i
ven
s
ector c
a
n
b
e ver
i
f
i
ed
b
y wr
i
t
i
ng
a
DYB/PPB/PPB lock ver
i
fy comm
a
nd to the dev
i
ce
.
Per
sis
tent
S
ector Protect
i
on Mode
Lock
i
n
g
B
i
t
L
i
ke the p
ass
word mode lock
i
ng
bi
t,
a
Per
sis
tent
S
ec-
tor Protect
i
on mode lock
i
ng
bi
t ex
is
t
s
to g
ua
r
a
ntee th
a
t
the dev
i
ce rem
ai
n
i
n
s
oftw
a
re
s
ector protect
i
on
.
Once
s
et, the Per
sis
tent
S
ector Protect
i
on lock
i
ng
bi
t pre-
vent
s
progr
a
mm
i
ng of the p
ass
word protect
i
on mode
lock
i
ng
bi
t
.
Th
is
g
ua
r
a
ntee
s
th
a
t
a
n
u
n
au
thor
i
zed
us
er
co
u
ld not pl
a
ce the dev
i
ce
i
n p
ass
word protect
i
on
mode
.
Pa
ss
word Protect
i
on Mode
The P
ass
word
S
ector Protect
i
on Mode method
a
llow
s
a
n even h
i
gher level of
s
ec
u
r
i
ty th
a
n the Per
sis
tent
S
ector Protect
i
on Mode
.
There
a
re two m
ai
n d
i
ffer-
ence
s
b
etween the Per
sis
tent
S
ector Protect
i
on
a
nd
the P
ass
word
S
ector Protect
i
on Mode
:
■
When the dev
i
ce
is
f
i
r
s
t powered on, or come
s
o
u
t
of
a
re
s
et cycle, the PPB Lock
bi
t
s
et to the
locked
s
tate
, r
a
ther th
a
n cle
a
red to the
u
nlocked
s
t
a
te
.
■
The only me
a
n
s
to cle
a
r the PPB Lock
bi
t
is
b
y wr
i
t-
i
ng
a
u
n
iqu
e
64-b
i
t Pa
ss
word
to the dev
i
ce
.
The P
ass
word
S
ector Protect
i
on method
is
otherw
is
e
i
dent
i
c
a
l to the Per
sis
tent
S
ector Protect
i
on method
.
A 64-
bi
t p
ass
word
is
the only
a
dd
i
t
i
on
a
l tool
u
t
i
l
i
zed
i
n
th
is
method
.
The p
ass
word
is
s
tored
i
n
a
one-t
i
me pro
g
rammable
(OTP)
reg
i
on of the fl
as
h memory
.
Once the P
ass
word
Mode Lock
i
ng B
i
t
is
s
et, the p
ass
word
is
perm
a
nently
s
et w
i
th no me
a
n
s
to re
a
d, progr
a
m, or er
as
e
i
t
.
The
p
ass
word
is
us
ed to cle
a
r the PPB Lock
bi
t
.
The P
ass
-
word Unlock comm
a
nd m
us
t
b
e wr
i
tten to the fl
as
h,
a
long w
i
th
a
p
ass
word
.
The fl
as
h dev
i
ce
i
ntern
a
lly
comp
a
re
s
the g
i
ven p
ass
word w
i
th the pre-pro-
gr
a
mmed p
ass
word
.
If they m
a
tch, the PPB Lock
bi
t
is
cle
a
red,
a
nd the PPB
s
c
a
n
b
e
a
ltered
.
If they do not
m
a
tch, the fl
as
h dev
i
ce doe
s
noth
i
ng
.
There
is
a
bui
lt-
i
n 2
μs
del
a
y for e
a
ch “p
ass
word check
.
” Th
is
del
a
y
is
i
ntended to thw
a
rt
a
ny effort
s
to r
u
n
a
progr
a
m
th
a
t tr
i
e
s
a
ll po
ssib
le com
bi
n
a
t
i
on
s
i
n order to cr
a
ck
the p
ass
word
.
Pa
ss
word and Pa
ss
word Mode Lock
i
n
g
B
i
t
In order to
s
elect the P
ass
word
s
ector protect
i
on
s
cheme, the c
us
tomer m
us
t f
i
r
s
t progr
a
m the p
ass
-
word
.
One method of choo
si
ng
a
p
ass
word wo
u
ld
b
e
to correl
a
te
i
t to the
u
n
iqu
e Electron
i
c
S
er
ia
l N
u
m
b
er
(E
S
N) of the p
a
rt
i
c
u
l
a
r fl
as
h dev
i
ce
.
Another method
co
u
ld gener
a
te
a
d
a
t
abas
e where
a
ll the p
ass
word
s
a
re
s
tored, e
a
ch of wh
i
ch correl
a
te
s
to
a
s
er
ia
l n
u
m
b
er
on the dev
i
ce
.
E
a
ch E
S
N
is
d
i
fferent for every fl
as
h
dev
i
ce
;
therefore e
a
ch p
ass
word
s
ho
u
ld
b
e d
i
fferent
for every fl
as
h dev
i
ce
.
Wh
i
le progr
a
mm
i
ng
i
n the p
ass
-
word reg
i
on, the c
us
tomer m
a
y perform P
ass
word
Ver
i
fy oper
a
t
i
on
s.
Once the de
si
red p
ass
word
is
progr
a
mmed
i
n, the
c
us
tomer m
us
t then
s
et the P
ass
word Mode Lock
i
ng
B
i
t
.
Th
is
oper
a
t
i
on
a
ch
i
eve
s
two o
bj
ect
i
ve
s:
DYB
PPB
PPB
Lock
S
ector
S
tate
0
0
0
Unprotected—PPB
a
nd DYB
a
re
ch
a
nge
ab
le
0
0
1
Unprotected—PPB not
ch
a
nge
ab
le, DYB
is
ch
a
nge
ab
le
0
1
0
Protected—PPB
a
nd DYB
a
re
ch
a
nge
ab
le
1
0
0
1
1
0
0
1
1
Protected—PPB not
ch
a
nge
ab
le, DYB
is
ch
a
nge
ab
le
1
0
1
1
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29BDD160GB17DPBF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB17DPBI | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB17DPBK | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20AKE | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20AKF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
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