
ASAHI KASEI
[AK5384]
MS0225-E-00
2003/05
- 3 -
PIN/FUNCTION
No. Pin Name
1
LIN2+
2
LIN2
3
RIN2+
4
RIN2
5
TEST
I/O
I
I
I
I
I
Function
ADC2 Lch Positive Analog Input Pin
ADC2 Lch Negative Analog Input Pin
ADC2 Rch Positive Analog Input Pin
ADC2 Rch Negative Analog Input Pin
Test Pin (Connected to AVSS)
Common Voltage Output Pin, AVDD/2
Normally connected to AVSS with a 0.1
μ
F ceramic capacitor in parallel with an
electrolytic capacitor less than 2.2
μ
F.
Analog Ground Pin
Analog Power Supply Pin, 4.75
~
5.25V
Audio Interface Format Pin
“L” : 24bit MSB justified, “H” : 24bit I
2
S Compatible
TDM I/F BICK Frequency Select Pin
“L” : 256fs, “H” : 128fs
TDM I/F Format Enable Pin
“L” : Normal Mode, “H” : TDM Mode
TDM Data Input Pin
Master Clock Input Pin
Analog Input Overflow Detect Pin
This pin goes to “H” if one of four analog inputs overflows.
Output Channel Clock Pin
“L” Output in Master Mode at Power-down mode.
Audio Serial Data Clock Pin
“L” Output in Master Mode at Power-down mode.
ADC2 Audio Serial Data Output Pin
“L” Output at Power-down mode.
ADC1 Audio Serial Data Output Pin
“L” Output at Power-down mode.
Output Buffer Power Supply Pin, 3.0
~
5.25V
Digital Power Supply Pin, 4.75
~
5.25V
Digital Ground Pin
Power-Down Mode Pin
When “L”, the circuit is in power-down mode.
The AK5384 should always be reset upon power-up.
Master Clock Select Pin
“L” : 256fs, “H” : 512fs
This pin is enabled in Master Mode.
Master / Slave Mode Pin
“L” : Slave Mode, “H” : Master Mode
ADC1 Rch Negative Analog Input Pin
ADC1 Rch Positive Analog Input Pin
ADC1 Lch Negative Analog Input Pin
ADC1 Lch Positive Analog Input Pin
6
VCOM
O
7
8
AVSS
AVDD
-
-
9
DIF
I
10
TDM1
I
11
TDM0
I
12
13
TDMIN
MCLK
I
I
14
OVF
O
15
LRCK
I/O
16
BICK
I/O
17
SDTO2
O
18
SDTO1
O
19
20
21
TVDD
DVDD
DVSS
-
-
-
22
PDN
I
23
CKS
I
24
M/S
I
25
26
27
28
RIN1
RIN1+
LIN1
LIN1+
I
I
I
I
Note: All digital input pins should not be left floating.