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參數(shù)資料
| 型號(hào)： | AK5393-VS |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | Enhanced Dual bit 96 kHz 24-bit ADC |
| 中文描述： | 增強(qiáng)雙位96 kHz的24位ADC |
| 文件頁(yè)數(shù)： | 8/18頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | AK5393-VS |
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ASAHI KASEI
[AK5393]
M0038-E-04
2000/4
- 8 -
DIGITAL
CHARACTERISTICS
(Ta=25
°
C; VA=5.0V
±
5%; VD=3.0 ~ 5.25V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage Iout=-20μA
Low-Level Output Voltage Iout=20μA
Input Leakage Current
Symbol
VIH
VIL
VOH
VOL
Iin
min
typ
-
-
-
max
-
30%VD
-
0.1
±
10
Units
V
V
V
V
μA
70%VD
-
VD-0.1
-
-
-
SWITCHING
CHARACTERISTICS
(Ta=25
°
C; VA=5.0V
±
5%; VD=3.0 ~ 5.25V; C
L
=20pF)
Parameter
Control Clock Frequency
Master Clock 256fs:
Pulse width Low
Pulse width High
Serial Data Output Clock (SCLK)
Channel Select Clock (LRCK)
duty cycle
Serial Interface Timing
(Note 9)
Slave Mode(SMODE1="L")
SCLK Period
SCLK Pulse width Low
Pulse width High
SCLK falling to LRCK Edge (Note 10)
LRCK Edge to SDATA MSB Valid
SCLK falling to SDATA Valid
SCLK falling to FSYNC Edge
Master Mode(SMODE1="H")
SCLK Frequency (DFS="L")
SCLK Frequency (DFS="H")
duty cycle
FSYNC Frequency
duty cycle
SCLK falling to LRCK Edge
LRCK Edge to FSYNC rising
SCLK falling to SDATA Valid
SCLK falling to FSYNC Edge
Reset/Calibration timing
RST Pulse width
RST falling to CAL rising
RST rising to CAL falling (Note 11)
RST rising to SDATA Valid (Note 11)
Symbol
min
typ
max
Units
fCLK
tCLKL
tCLKH
fSLK
fs
0.256
29
29
1
25
12.288
6.144
48
13.824
6.912
108
75
MHz
ns
ns
MHz
kHz
%
tSLK
tSLKL
tSLKH
tSLR
tDLR
tDSS
tSF
fSLK
fSLK
fFSYNC
tSLR
tLRF
tDSS
tSF
144.7
65
65
-45
-45
-20
-20
128fs
64fs
50
2fs
50
1
45
45
45
45
20
45
20
ns
ns
ns
ns
ns
ns
ns
Hz
Hz
%
Hz
%
ns
tslk
ns
ns
tRTW
tRCR
tRCF
tRTV
150
8704
8960
50
ns
ns
1/fs
1/fs
Notes: 9. Refer to Serial Data interface.
10. Specified LRCK edges not to coincide with the rising edges of SCLK.
11. The number of the LRCK rising edges after RST brought high at DFS="L". The value is in master mode.
In slave mode it becomes one LRCK clock(1/fs) longer. When DFS="H", tRCF=17408 and tRTV=17920.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK5393VSP | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:24-BIT, 96KHZ ANALOG-TO-DIGITAL CONVERTER |
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