參數(shù)資料
型號(hào): AK4706
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 2ch 24bit DAC with AV Switch & HD/SD Video Filter
中文描述: 2通道24位DAC,帶有AV系列開(kāi)關(guān)
文件頁(yè)數(shù): 22/53頁(yè)
文件大小: 597K
代理商: AK4706
ASAHI KASEI
[AK4706]
MS0507-E-00
2006/05
- 22 -
DAC Power-down Mode
The internal DAC block can be powered-down and switched to 1Vrms analog input mode. When DAPD bit =“1”, the
zero-cross detection and offset calibration does not work.
DAPD bit (00H D2): DAC power-down bit.
“1”: DAC power-down. Analog-input mode.
#52 pin: MCLK
Unused pin. This pin should be open.
#53 pin: BICK
DACR. Rch analog input.
#54 pin: SDTI
Unused pin. This pin should be open.
#55 pin: LRCK
DACL. Lch analog input.
“0”: DAC operation. (default)
Standby Mode
When the AUTO bit = MUTE bit = “0” and the STBY bit = “1”, the AK4706 is forced into TV-VCR loop through mode.
In this mode, the sources of TVOUTL/R and MONOOUT pins are fixed to VCRINL/R pins; the sources of VCROUTL/R
are fixed to TVINL/R pins respectively. The gain of volume#1 is fixed to 0dB. All register values themselves are NOT
changed by STBY bit = “1”.
STBY bit (00H D0): Standby bit.
“1”: Standby mode. (default)
“0”: Normal operation.
Mute Mode (Bias-off Mode. 00H: D1)
When the MUTE bit = “1”, the bias voltage on the audio output goes to GND level. Bringing MUTE bit to “0” changes
this bias voltage smoothly from GND to VP/2 by 2sec(typ.). This removes the huge click noise related the sudden change
of bias voltage at power-on. The change of MUTE bit from “1” to “0” also makes smooth transient from VP/2 to GND by
2sec(typ). This removes the huge click noise related the sudden change of bias voltage at power-off.
MUTE bit: Bias-off bit.
“1”: Set the audio bias to GND. (default)
“0”: Normal operation
Normal Operation Mode
To use the DAC or change analog switches, set the AUTO bit, DAPD bit, MUTE bit and STBY bit to “0”. The DAC is in
power-down mode until MCLK and LRCK are input. The AK4706 is in power-down mode until MCLK and LRCK are
input. The Figure 2 shows an example of the system timing at the power-down and power-up by PDN pin.
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