參數(shù)資料
型號(hào): AK4705
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 2ch 24bit DAC with AV SCART Switch
中文描述: 2通道24位DAC,具有影音SCART開關(guān)
文件頁數(shù): 45/50頁
文件大小: 660K
代理商: AK4705
[AK4705]
MS0451-E-01
2007/06
- 45 -
Grounding and Power Supply Decoupling
VD, VP, VVD1, VVD2, VSS and VVSS should be supplied from analog supply unit with low impedance and be
separated from system digital supply. An electrolytic capacitor 10
μ
F parallel with a 0.1
μ
F ceramic capacitor should be
attached to these pins to eliminate the effects of high frequency noise. The 0.1
μ
F ceramic capacitors should be placed as
near to VD (VP, VVD1, VVD2) as possible.
Voltage Reference
DVCOM and PVCOM are signal ground of this chip. An electrolytic capacitor 10
μ
F parallel with a 0.1
μ
F ceramic
capacitor should be attached to these VCOM pins to eliminate the effects of high frequency noise. No load current may be
taken from these VCOM pins. All signals, especially clocks, should be kept away from these VCOM pins in order to
avoid unwanted coupling into the AK4705.
Analog Audio Outputs
The analog outputs are also single-ended and centered on 5.6V(typ.). The output signal range is typically 2Vrms
(typ@VD=5V). The internal switched-capacitor filter and continuous-time filter attenuate the noise generated by the
delta-sigma modulator beyond the audio pass band. Therefore, any external filters are not required for typical application.
The output voltage is a positive full scale for 7FFFFFH (@24bit) and a negative full scale for 800000H (@24bit). The
ideal output is 5.6V(typ.) for 000000H (@24bit). The DC voltage on analog outputs are eliminated by AC coupling.
REFI pin
The REFI pin is video current reference pin. This pin should be connected to VVD1 through a 10k
±1% resistor
externally as shown in Figure 20. No load current may be drawn from this pin. All signals, especially clocks, should be
kept away from this pin in order to avoid unwanted coupling.
AK4705
R=10k
±1%
IREF
VDD1
Figure 20. REFI pin
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