參數資料
型號: AK4647
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: Stereo CODEC with MIC/HP-AMP
中文描述: 立體聲編解碼器麥克風/惠普腺苷
文件頁數: 64/72頁
文件大?。?/td> 565K
代理商: AK4647
ASAHI KASEI
[AK4647]
MS0566-E-00
2006/11
- 64 -
3. PLL Slave Mode (MCKI pin)
BICK pin
LRCK pin
MCKO bit
(Addr:01H, D1)
PMPLL bit
(Addr:01H, D0)
(1)
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
(2)
(3)
MCKI pin
(5)
(4)
Input
MCKO pin
Output
(6)
(7)
40msec(max)
(8)
Input
Example:
Audio I/F Format: MSB justified (ADC & DAC)
Input Master Clock Select at PLL Mode: 11.2896MHz
MCKO: Enable
Sampling Frequency: 44.1kHz
(1) Power Supply & PDN pin = “L”
“H”
(3)Addr:00H, Data:40H
(2)Addr:04H, Data:4AH
Addr:05H, Data:27H
(4)Addr:01H, Data:03H
MCKO output start
BICK and LRCK input start
Figure 49. Clock Set Up Sequence (3)
<Example>
(1) After Power Up: PDN pin “L”
“H”
“L” time of 150ns or more is needed to reset the AK4647.
(2) DIF1-0, PLL3-0 and FS3-0 bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0”
“1”
VCOM should first be powered up before the other block operates.
(4) Enable MCKO output: MCKO bit = “1”
(5) PLL starts after that the PMPLL bit changes from “0” to “1” and PLL reference clock (MCKI pin) is supplied.
PLL lock time is 40ms(max).
(6) The normal clock is output from MCKO after PLL is locked.
(7) The invalid frequency is output from MCKO during this period.
(8) BICK and LRCK clocks should be synchronized with MCKO clock.
相關PDF資料
PDF描述
AK4647VN Stereo CODEC with MIC/HP-AMP
AK4648 Stereo CODEC with MIC/HP/SPK-AMP
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AK4650 16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
AK4650VG 16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
相關代理商/技術參數
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AK4647VN 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP
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AK4649 制造商:AKM 制造商全稱:AKM 功能描述:24bit Stereo CODEC with MIC/SPK-AMP