- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385093 > AK4646 (Asahi Kasei Microsystems Co.,Ltd) Stereo CODEC with MIC/SPK-AMP PDF資料下載
參數(shù)資料
| 型號(hào)： | AK4646 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類(lèi)： | Codec |
| 英文描述： | Stereo CODEC with MIC/SPK-AMP |
| 中文描述： | 立體聲編解碼器麥克風(fēng)/胰腎聯(lián)合移植腺苷 |
| 文件頁(yè)數(shù)： | 43/79頁(yè) |
| 文件大小： | 789K |
| 代理商： | AK4646 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)當(dāng)前第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)
[AK4646]
MS0557-E-02
2007/05
- 43 -
■
Input Digital Volume (Manual Mode)
The input digital volume becomes a manual mode at ALC1 bit = “0” when either Lch and Rch of ADC is powered-up
(PMADL bit = “1” or PMADR bit = “1”) and DAFIL bit is “0”. This mode is used in the case shown below.
1.
After exiting reset state, set-up the registers for the ALC operation (ZTM1-0, LMTH and etc)
2.
When the registers for the ALC operation (Limiter period, Recovery period and etc) are changed.
For example; when the change of the sampling frequency.
3.
When IVOL is used as a manual volume.
IVL7-0 and IVR7-0 bits set the gain of the volume control (Table 34). The IVOL value is changed at zero crossing or
timeout. The zero crossing timeout period is set by ZTM1-0 bits. If IVL7-0 or IVR7-0 bits are written during
PMADL=PMADR bits = “0”, IVOL operation starts with the written values at the end of the ADC initialization cycle
after PMADL or PMADR bit is changed to “1”.
If IVL7-0 or IVR7-0 bits are written during PMADL=PMADR bits = “0”, IVOL operation starts with the written values
at the end of the ADC initialization cycle after PMADL or PMADR bit is changed to “1”.
IVL7-0
IVR7-0
F1H
+36.0
F0H
+35.625
EFH
+35.25
:
:
E2H
+30.375
E1H
+30.0
E0H
+29.625
:
:
03H
53.25
02H
53.625
01H
54
00H
MUTE
Table 34. Input Digital Volume Setting
(default)
GAIN (dB)
Step
0.375dB
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4646EN | Stereo CODEC with MIC/SPK-AMP |
| AK4647 | Stereo CODEC with MIC/HP-AMP |
| AK4647VN | Stereo CODEC with MIC/HP-AMP |
| AK4648 | Stereo CODEC with MIC/HP/SPK-AMP |
| AK4648EC | Stereo CODEC with MIC/HP/SPK-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4646_11 | 制造商:AKM 制造商全稱(chēng):AKM 功能描述:Stereo CODEC with MIC/SPK-AMP |
| AK4646EN | 制造商:AKM 制造商全稱(chēng):AKM 功能描述:Stereo CODEC with MIC/SPK-AMP |
| AK4646ENP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:STEREO CODEC+SPK |
| AK4646EZ | 制造商:AKM 制造商全稱(chēng):AKM 功能描述:Stereo CODEC with MIC/SPK-AMP |
| AK4647 | 制造商:AKM 制造商全稱(chēng):AKM 功能描述:Stereo CODEC with MIC/HP-AMP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。