參數(shù)資料
型號: AK4642EN
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: Stereo CODEC with MIC/HP/SPK-AMP
中文描述: 立體聲編解碼器麥克風/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù): 23/83頁
文件大?。?/td> 670K
代理商: AK4642EN
ASAHI KASEI
[AK4642EN]
MS0420-E-00
2005/09
- 23 -
OPERATION OVERVIEW
System Clock
There are the following four clock modes to interface with external devices (see Table 1 and Table 2).
Mode
PMPLL bit
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
Don’t Care (Note 38)
Note 38. If this mode is selected, the invalid clocks are output from MCKO pin when MCKO bit is “1”.
Table 1. Clock Mode Setting (x: Don’t care)
Mode
MCKO bit
M/S bit
1
PLL3-0 bits
See Table 4
Figure
Figure 13
1
1
0
See Table 4
Figure 14
1
0
See Table 4
Figure 15
0
0
0
1
x
x
Figure 16
-
MCKO pin
“L”
Selected by
PS1-0 bits
“L”
Selected by
PS1-0 bits
MCKI pin
BICK pin
Output
(Selected by
BCKO bit)
Input
(Selectet by
BCKO bit)
Input
(Selected by
BCKO bit)
Input
(
32fs)
LRCK pin
0
PLL Master Mode
1
Selected by
PLL3-0 bits
Output
(1fs)
0
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
1
Selected by
PLL3-0 bits
Input
(1fs)
PLL Slave Mode
(PLL Reference Clock: LRCK or BICK pin)
0
“L”
GND
Input
(1fs)
EXT Slave Mode
0
“L”
Selected by
FS3-0 bits
Input
(1fs)
Table 2. Clock pins state in Clock Mode
Master Mode/Slave Mode
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK4642 is power-down mode (PDN pin = “L”) and exits reset state, the AK4642 is slave mode. After exiting reset state,
the AK4642 goes to master mode by changing M/S bit = “1”.
When the AK4642 is used by master mode, LRCK and BICK pins are a floating state until M/S bit becomes “1”. LRCK
and BICK pins of the AK4642 should be pulled-down or pulled-up by the resistor (about 100k
) externally to avoid the
floating state.
M/S bit
Mode
0
Slave Mode
1
Master Mode
Table 3. Select Master/Slave Mode
Default
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