參數(shù)資料
型號(hào): AK4569
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 20-Bit Stereo CODEC with IPGA & HP-AMP
中文描述: 20位立體聲編解碼器與單親遺傳算法
文件頁數(shù): 26/45頁
文件大?。?/td> 474K
代理商: AK4569
ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
- 26 -
Serial Control Interface
Internal registers may be written via to the 3 wire μP interface pins (CSN, CCLK and CDTI). The data on this interface
consists of Chip address (2bits, Fixed to “10”), Read/Write (1bit, Fixed to “1”, Write only), Register address (MSB first,
5bits) and Control data (MSB first, 8bits). Address and data is clocked in on the rising edge of CCLK. For write
operations, data is latched after a low-to-high transition of CSN. The clock speed of CCLK is 5MHz(max). The value of
internal registers is initialized at PDN= “L”.
CDTI
CCLK
CSN
C1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
D4
D5
D6
D7
A1
A2
A3
A4
R/W
C0
A0
D0
D1
D2
D3
C1-C0: Chip Address (Fixed to “10”)
R/W: Read/Write (Fixed to “1” : Write only)
A4-A0: Register Address
D7-D0: Control Data
Figure 21. Control Interface
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