參數(shù)資料
型號(hào)： AK4569
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： 20-Bit Stereo CODEC with IPGA & HP-AMP
中文描述： 20位立體聲編解碼器與單親遺傳算法
文件頁數(shù)： 14/45頁
文件大小： 474K
代理商： AK4569
ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
- 14 -
OPERATION OVERVIEW
System Clock
The external clocks required to operate the AK4569 are MCLK(256fs/384fs/512fs), LRCK(fs) and BICK. The master
clock (MCLK) should be synchronized with sampling clock (LRCK). The phase between these clocks does not matter.
The frequency of MCLK is detected automatically, and the internal master clock becomes the appropriate frequency.
Table 1 shows system clock example.
LRCK
MCLK (MHz)
fs
256fs
384fs
8kHz
2.048
3.072
11.025kHz
2.8224
4.2336
12kHz
3.072
4.608
16kHz
4.096
6.144
22.05kHz
5.6448
8.4672
24kHz
6.144
9.216
32kHz
8.192
12.288
44.1kHz
11.2896
16.9344
48kHz
12.288
18.432
BICK (MHz)
64fs
0.512
0.7056
0.768
1.024
1.4112
1.536
2.048
2.8224
3.072
512fs
4.096
5.6448
6.144
8.192
11.2896
12.288
16.384
22.5792
24.576
Table 1. System Clock Example
External clocks (MCLK, BICK and LRCK) are needed to operate ADC or DAC. All external clocks (MCLK, BICK and
LRCK) should always be present whenever the ADC or DAC is in normal operation mode (PMADC bit = “1” or PMDAC
bit = “1”). If these clocks are not provided, the AK4569 may draw excess current and will not operate properly because it
utilizes these clocks for internal dynamic refresh of registers. If the external clocks are not present, AK4569 should be
placed in power-down mode (PDN pin = “L” or PMADC bit = PMDAC bit = “0”). When MCLK is input with AC
coupling, the MCKAC bit should be set to “1”. If MCLK with AC coupling stops, MCKPD bit should be set to “1”.
For low sampling rates, outband noise causes both DR and S/N to degrade. DR and S/N are improved by setting DFS bit
to “1”. Table 2 shows S/N of DAC output for both the HP-amp and MOUT. When the DFS bit is “1”, MCLK needs 512fs.
During normal operation, when the ADC or DAC sampling frequency is changed (PMADC bit = “1” or PMDAC bit =
“1”), the DAC output should be soft-muted or “0” data should be input to avoid pop noise.
S/N (fs=8kHz, A-weighted)
HP-amp
84dB
90dB
Default
DFS
fs
MCLK
MOUT
84dB
88dB
0
1
8kHz
～
48kHz
8kHz
～
24kHz
256fs/384fs/512fs
512fs
Table 2. Relationship among fs, MCLK frequency and S/N of HP-amp and MOUT
相關(guān)PDF資料
PDF描述
AK4569VN 20-Bit Stereo CODEC with IPGA & HP-AMP
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4569VN 制造商:AKM 制造商全稱:AKM 功能描述:20-Bit Stereo CODEC with IPGA & HP-AMP
AK4571 制造商:AKM 制造商全稱:AKM 功能描述:USB I/F Audio CODEC
AK4571_05 制造商:AKM 制造商全稱:AKM 功能描述:USB Interface Audio CODEC
AK4571VQ 制造商:AKM 制造商全稱:AKM 功能描述:USB Interface Audio CODEC
AK4571VQP 功能描述:IC AUDIO CODEC W/USB 16B 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率（位）:15 b ADC / DAC 數(shù)量:1 / 1 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):- 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):- 電壓 - 電源，模擬:2.7 V ~ 3.3 V 電壓 - 電源，數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-VFBGA 供應(yīng)商設(shè)備封裝:80-BGA MICROSTAR JUNIOR（5x5） 包裝:帶卷 (TR) 其它名稱:296-21257-2
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