參數(shù)資料
型號(hào)： AK4562VN
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類(lèi)： Codec
英文描述： LOW POWER 20BIT CODEC WITH PGA
中文描述： 低功耗20位編解碼器美巡賽
文件頁(yè)數(shù)： 22/29頁(yè)
文件大小： 167K
代理商： AK4562VN
ASAHI KASEI
[AK4562]
MS0031-E-00
2000/05
- 22 -
n
Detail of functions
(1)
Input Analog PGA with Zero Crossing Detection
Zero crossing is detected on L/R channels independently. If zero crossing is not detected, IPGA value changes by
timeout. Timeout cycle can be set by ZTM1-0 bit. For example, when ZTM1-0 is “11”, timeout cycle is 2048/fs =
46.4ms (@fs=44.kHz). Zero crossing detection function can be controlled by ON/OFF of ZEIP bit. If ZEIP is OFF,
gain level changes immediately by writing IPGA value.
Offset calibration starts by PDN pin “L” to “H”. IPGA is set MUTE during offset calibration and after offset
calibration.
(2)
Monaural Mixing
ADC
HPF
Lch
Rch
ADC
HPF
+
x 0.5
Lch
Rch
S
S
SW1
SW2
Figure 16. Monaural Mixing
Mode
SW1
Lch
SW2
Rch
MONO1
0
MONO0
0
Stereo Recording
Monaural Recording
Stereo Input
Monaural Recording
Lch Input only
Monaural Recording
Rch Input only
(L+R)/2
(L+R)/2
0
1
Lch
Lch
1
0
Rch
Rch
1
1
Table 5. Monaural Mode Setting
(3)
De-emphasis
Include digital de-emphasis filter circuit with tc=50/15us.
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