- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385092 > AK4528 (Asahi Kasei Microsystems Co.,Ltd) HIGH PERFORMANCE 24BIT 96KHZ AUDIO CODEC PDF資料下載
參數(shù)資料
| 型號： | AK4528 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | HIGH PERFORMANCE 24BIT 96KHZ AUDIO CODEC |
| 中文描述： | 高性能24位96kHz的音頻編解碼器 |
| 文件頁數(shù)： | 11/29頁 |
| 文件大小： | 284K |
| 代理商： | AK4528 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
ASAHI KASEI
[AK4528]
MS0011-E-00
2000/1
- 11 -
OPERATION OVERVIEW
n
System Clock Input
The external clocks, which are required to AK4528, are MCLK, BICK and LRCK. MCLK should be synchronized with
LRCK but the phase is not critical. The frequency of MCLK is set by CMODE, CKS0-1 and DFS bits in serial mode, or by
CKS0-1, DFS pins in parallel mode (see Table 2 and 3). The CKS0-1 and DFS pin should be changed during the PDN pin
= “L”. The CMODE, CKS0-1 and DFS bits are changed during RSTADN=RSTDAN= “0”.
External clocks (MCLK, BICK and LRCK) should always be present whenever the AK4528 is in normal operation mode
(PDN=”H” and at least one of ADC and DAC is in normal operation mode). If these clocks are not provided, the AK4528
may draw excess current because the device utilizes dynamic refreshed logic internally. If the external clocks are not
present, the AK4528 should be in the power-down mode (PDN=”L” or set both ADC and DAC power down mode by the
register).
CMODE bit
CKS1 bit
CKS0 bit
MCLK
Normal Speed
(DFS bit=”0”)
256fs
512fs
1024fs
384fs
768fs
MCLK
Double Speed
(DFS bit=”1”)
N/A
256fs
512fs
N/A
384fs
0
0
0
1
1
0
0
1
0
0
0
1
0
0
1
Default
Table 1. Master Clock Frequency Select in Serial Mode
CKS1 pin
CKS0 pin
MCLK
Normal Speed
(DFS pin = “L”)
256fs
512fs
384fs
1024fs
MCLK
Double Speed
(DFS pin = “H”)
N/A
256fs
N/A
512fs
L
L
H
H
L
H
L
H
Table 2. Master Clock Frequency Select in Parallel Mode
MCLK
Normal Speed
(DFS = “0”)
256fs
512fs
1024fs
384fs
768fs
fs=44.1kHz
fs=48kHz
MCLK
Double Speed
(DFS = “1”)
N/A
256fs
512fs
N/A
384fs
fs=88.2kHz
fs=96kHz
11.2896MHz
22.5792MHz
45.1584MHz
16.9344MHz
33.8688MHz
12.288MHz
24.576MHz
49.152MHz
18.432MHz
36.864MHz
N/A
N/A
22.5792MHz
45.1584MHz
N/A
33.8688MHz
24.576MHz
49.152MHz
N/A
36.864MHz
Table 3. Master Clock Frequencies example
Note. Do not set any mode which is not described in Table1-3.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4528VF | HIGH PERFORMANCE 24BIT 96KHZ AUDIO CODEC |
| AK4529 | High Performance Multi-channel Audio CODEC |
| AK4532 | Internet/Network/General Purpose Multimedia Audio CODEC |
| AKD4532 | Internet/Network/General Purpose Multimedia Audio CODEC |
| AK4533 | Audio Codec with Touch Screen Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4528_04 | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance 24Bit 96kHz Audio CODEC |
| AK4528_12 | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance 24Bit 96kHz Audio CODEC |
| AK4528VF | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance 24Bit 96kHz Audio CODEC |
| AK4528VFP-E2 | 功能描述:IC AUDIO CODEC 24BIT 28VSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| AK4528VM | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance 24Bit 96kHz Audio CODEC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。