參數(shù)資料
型號: AK4395
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: ADVANCED MULTI-BIT 192KHZ 24-BIT DAC
中文描述: 先進的多位192kHz的24位DAC
文件頁數(shù): 21/26頁
文件大?。?/td> 277K
代理商: AK4395
ASAHI KASEI
[AK4395]
MS0040-E-00
2000/7
- 21 -
SYSTEM DESIGN
Figure 9 and 10 show the system connection diagram. The output filter circuits are shown in Figure 12 and Figure 13. An
evaluation board (AKD4395) is available which demonstrates the optimum layout, power supply arrangements and
measurement results.
DVSS
1
DVDD
2
MCLK
3
PDN
4
BICK
5
SDATA
6
LRCK
7
CSN
8
CAD0
9
CCLK
10
CDTI
11
DIF0
12
DZFR
28
CAD1
27
DZFL
26
P/S
25
VCOM
24
AOUTL+
23
AOUTL-
22
AOUTR+
21
AOUTR-
20
AVSS
19
AVDD
18
VREFH
17
Master Clock
Micro-
controller
0.1u
10u
+
10u
+
0.1u
10u
+
Supply 5V
AK4395
0.1u
16
Digital
Supply 5V
13
14
15
DIF1
DIF2
VREFL
BVSS
fs
24bit Audio Data
Reset & Power down
64fs
+
0.1u
Lch
LPF
Rch
LPF
Rch Out
Lch Out
Analog Ground
Digital Ground
Lch
Mute
Rch
Mute
Analog
Figure 9. Typical Connection Diagram (Serial Mode, Chip Address = “00”)
Notes:
- LRCK = fs, BICK = 64fs.
- Power lines of AVDD and DVDD should be distributed separately from the point with low impedance of
regulator etc.
- AVSS, BVSS and DVSS must be connected to the same analog ground plane.
- When AOUT drives some capacitive load, some resistor should be added in series between AOUT and capacitive
load.
- All input pins except pull-down/pull-up pins should not be left floating.
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