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參數(shù)資料
| 型號： | AK4395 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | ADVANCED MULTI-BIT 192KHZ 24-BIT DAC |
| 中文描述： | 先進的多位192kHz的24位DAC |
| 文件頁數(shù)： | 18/26頁 |
| 文件大?。?/td> | 277K |
| 代理商： | AK4395 |
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ASAHI KASEI
[AK4395]
MS0040-E-00
2000/7
- 18 -
n
Mode Control Interface
Pins (parallel control mode) or registers (serial control mode) can control each functions of the AK4395. For DIF0/1/2, the
setting of pin and register are “ORed” internally. So, even serial control mode, these functions can be also controlled by pin
setting.
The serial control interface is enabled by the P/S pin = “L”. In this mode, pin setting must be all “L”. Internal registers may
be written by 3-wire μP interface pins: CSN, CCLK and CDTI. The data on this interface consists of Chip address (2bits,
CAD0/1), Read/Write (1bit; fixed to “1”), Register address (MSB first, 5bits) and Control data (MSB first, 8bits). The
AK4395 latches the data on the rising edge of CCLK, so data should be clocked in on the falling edge. The writing of data
becomes valid by CSN “
↑
”. The clock speed of CCLK is 5MHz (max). The CSN and CCLK must be fixed to “H” when the
register does not be accessed.
Function
Auto Setting Mode
Manual Setting Mode
De-emphasis
SMUTE
Zero Detection
Slow roll-off response
Digital Attenuator
Parallel mode
O
O (Partially)
O
O
X
X
X
Serial mode
O
O
O
O
O
O
O
Table 10. Function List (O: Available, X: Not available)
PDN = “L” resets the registers to their default values. When the state of P/S pin is changed, the AK4395 should be reset by
PDN = “L”. In serial mode, the internal timing circuit is reset by RSTN bit, but the registers are not initialized.
CDTI
CCLK
C1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
D4
D5
D6
D7
A1
A2
A3
A4
R/W
C0
A0
D0
D1
D2
D3
CSN
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (C1=CAD1, C0=CAD0)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 8. Control I/F Timing
*When the AK4395 is in the power down mode (PDN = “L”) or the MCLK is not provided, writing into the control register
is inhibited.
*For setting the registers, the following sequence is recommended.
Control 1 register
(1) Writing RSTN = “0” and other bits (D7-D1) to the register at the same time.
(2) Writing RSTN = “1” to the register. The other bits are no change.
Control 2 register
This writing sequence has no limitation like control 1 register.
When setting DEM0/1 and SMUTE, RSTN is not needed.
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| AK4395VF | 制造商:AKM 制造商全稱:AKM 功能描述:ADVANCED MULTI-BIT 192KHZ 24-BIT DAC |
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| AK4395VFP-E2 | 功能描述:IC DAC 24BIT STEREO 28VSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| AK4396 | 制造商:AKM 制造商全稱:AKM 功能描述:192kHz sampling 24Bit ツヒ DAC |
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