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參數(shù)資料
| 型號： | AK4394 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | ADVANCED MULTI-BIT 192KHZ 24-BIT DAC |
| 中文描述： | 先進的多位192kHz的24位DAC |
| 文件頁數(shù)： | 12/26頁 |
| 文件大?。?/td> | 299K |
| 代理商： | AK4394 |
ASAHI KASEI
[AK4394]
M0081-E-00
1999/11
- 12 -
LRCK
fs
88.2kHz
96.0kHz
MCLK
BICK
64fs
128fs
192fs
256fs
384fs
11.2896MHz
12.2880MHz
16.9344MHz
18.4320MHz
22.5792MHz
24.5760MHz
33.8688MHz
36.8640MHz
5.6448MHz
6.1440MHz
Table 4. System clock example (Double Speed Mode)
LRCK
fs
176.4kHz
192.0kHz
MCLK
BICK
64fs
128fs
192fs
22.5792MHz
24.5760MHz
33.8688MHz
36.8640MHz
11.2896MHz
12.2880MHz
Table 5. System clock example (Quad Speed Mode)
n
Audio
Serial
Interface
Format
Data is shifted in via the SDATA pin using BICK and LRCK inputs. Five data formats are supported and selected by the
DIF0-2 as shown in Table 6. In all formats the serial data is MSB-first, 2's compliment format and is latched on the rising
edge of BICK. Mode 2 can be used for 20 and 16 MSB justified formats by zeroing the unused LSBs.
Mode
0
1
2
3
4
DIF2
DIF1
0
0
1
1
0
DIF0
0
1
0
1
0
Mode
BICK
3
32fs
3
40fs
3
48fs
3
48fs
3
48fs
Figure
Figure 1
Figure 2
Figure 3
Figure 4
Figure 2
0
0
0
0
1
0: 16bit LSB Justified
1: 20bit LSB Justified
2: 24bit MSB Justified
3: I
2
S Compatible
4: 24bit LSB Justified
Table 6. Audio Data Formats
SDATA
Mode 0
BICK
(32fs)
LRCK
SDATA
Mode 0
15
14
6
5
4
BICK
(64fs)
0
1
10
11
12
13
14
15
0
1
10
11
12
13
14
15
0
1
3
2
1
0
15
14
0
14
1
15
16
17
31
0
1
14
15
16
17
31
0
1
15
14
0
15
14
0
Don’t care
Don’t care
15:MSB, 0:LSB
15
14
6
5
4
3
2
1
0
Lch Data
Rch Data
Figure 1. Mode 0 Timing
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| AK4395VF-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
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