參數(shù)資料
型號(hào)： AK4387ET
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： 106dB 192kHz 24-Bit 2ch ツヒ DAC
中文描述： 一零六分貝192kHz的24位2通道ツヒ數(shù)模轉(zhuǎn)換器
文件頁(yè)數(shù)： 13/21頁(yè)
文件大?。?/td> 257K
代理商： AK4387ET
ASAHI KASEI
[AK4387]
MS0429-E-00
2005/09
- 13 -
System Reset
The AK4387 should be reset once by bringing RSTN pin = “L” upon power-up. The AK4387 is powered up and the
internal timing starts clocking by LRCK “
↑
” after exiting reset and power down state by MCLK. The AK4387 is in the
power-down mode until MCLK and LRCK are input.
Power-down
The AK4387 is placed in the power-down mode by bringing RSTN pin “L” and the anlog outputs become VCOM voltage
(AVDD/2). Figure 6 shows an example of the system timing at the power-down and power-up.
RSTN
Normal Operation
Internal
State
Power-down
Normal Operation
GD
GD
“0” data
D/A Out
(Analog)
D/A In
(Digital)
Clock In
MCLK, LRCK, BICK
(1)
(3)
(6)
DZF
External
MUTE
(5)
(3)
(1)
Mute ON
(2)
(4)
Don’t care
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are VCOM voltage (AVDD/2) at the power-down mode.
(3) Click noise occurs at the edge of RSTN signal. This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (RSTN pin = “L”).
(5) Please mute the analog output externally if the click noise (3) influences system application.
The timing example is shown in this figure.
(6) DZF pin is “L” in the power-down mode (RSTN pin = “L”).
Figure 6. Power-down/up Sequence Example
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