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參數(shù)資料
| 型號： | AK4386 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 100DB 96KHZ 24 BIT 2CH |
| 中文描述： | 100dB的96kHz的24位二通 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 129K |
| 代理商： | AK4386 |
ASAHI KASEI
[AK4386]
MS0280-E-00
2003/12
- 14 -
SYSTEM DESIGN
Figure 7 shows the system connection diagram. An evaluation board is available which demonstrates application circuits,
the optimum layout, power supply arrangements and measurement results.
MCLK
1
BICK
2
SDTI
3
LRCK
4
PDN
5
DFS0
6
DFS1
7
DEM
8
TEST
16
DIF1
15
VDD
14
VSS
13
VCOM
12
LOUT
11
ROUT
10
DIF0
9
Master Clock
Mode
Setting
AK4386
fs
24bit Audio Data
Reset & Power down
64fs
4.7u
0.1u
+
Rch Out
Lch Out
Analog Ground
Digital Ground
Analog Supply
2.2 to 3.6V
+
10u
(C)
Note:
- VSS of the AK4386 should be distributed separately from the ground of external digital devices (MPU, DSP etc.).
- When AOUT drive some capacitive load, some resistor should be added in series between AOUT and capacitive
load.
- The value of the capacitor connected to VCOM pin should be 1
μ
F
≤
C
≤
10
μ
F.
- All digital input pins should not be left floating.
Figure 7. Typical Connection Diagram
1. Grounding and Power Supply Decoupling
The AK4386 requires careful attention to power supply and grounding arrangements. VDD is usually supplied from the
analog supply in the system. System analog ground and digital ground should be connected together near to where the
supplies are brought onto the printed circuit board. Decoupling capacitors should be as near to the AK4386 as possible,
with the small value ceramic capacitor being the closest.
2. Voltage Reference
The differential Voltage between VDD and VSS sets the analog output range. VCOM is used as a common voltage of the
analog signal. VCOM pin is a signal ground of this chip. An electrolytic capacitor about 4.7
μ
F should be attached
between VCOM pin and VSS. No load current may be drawn from VCOM pin. Especially, the ceramic capacitor should
be connected to this pin as near as possible.
3. Analog Outputs
The analog outputs are single-ended and centered around the VCOM voltage (0.55
×
VDD). The output signal range is
typically 2.0Vpp (typ@VDD=3.0V). The internal switched-capacitor filter and continuous-time filter attenuate the noise
generated by the delta-sigma modulator beyond the audio passband. The output voltage is a positive full scale for
7FFFFFH (@24bit) and a negative full scale for 800000H (@24bit). The ideal output is VCOM voltage (0.55
×
VDD) for
000000H (@24bit).
DC offsets on analog outputs are eliminated by AC coupling since analog outputs have DC offsets of VCOM + a few mV.
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