參數(shù)資料
型號: AK4367VN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Low Power 24-Bit 2ch DAC with HP-AMP & Output Mixer
中文描述: 低功耗24位2通道DAC,具有惠普腺苷
文件頁數(shù): 4/38頁
文件大小: 455K
代理商: AK4367VN
ASAHI KASEI
[AK4367]
MS0247-E-02
- 4 -
2005/10
PIN/FUNCTION
No. Pin Name
SDA
1
CDTI
SCL
2
CCLK
CAD0
3
CSN
4
SDATA
I/O
I/O
I
I
I
I
I
I
Function
Control Data Input/Output Pin (I2C pin = “H”)
Control Data Input Pin (I2C pin = “L”)
Control Data Clock Pin (I2C pin = “H”)
Control Data Clock Pin (I2C pin = “L”)
Chip Address 0 Select Pin (I2C pin = “H”)
Control Data Chip Select Pin (I2C pin = “L”)
Audio Serial Data Input Pin
L/R Clock Pin
This clock determines which audio channel is currently being input on SDATA pin.
Serial Bit Clock Pin
This clock is used to latch audio data.
Master Clock Input Pin
Power-down & Reset Pin
When at “L”, the AK4367 is in power-down mode and is held in reset.
The AK4367 should always be reset upon power-up.
Control Mode Select Pin (Internal Pull-down Pin)
“H”: I
2
C Bus, “L”: 3-wire Serial
Mono Analog Output Pin
Common Voltage Output Pin
Normally connected to VSS pin with 0.1
μ
F ceramic capacitor in parallel with a 2.2
μ
F
electrolytic capacitor.
Mute Time Constant Control Pin
Connected to VSS pin with a capacitor for mute time constant.
Power Supply Pin
Ground Pin
Power Supply Pin for Headphone Amp
Rch Headphone Amp Output Pin
Lch Headphone Amp Output Pin
Mono Analog Input Pin
Rch Analog Input Pin
Lch Analog Input Pin
5
LRCK
I
6
BICK
I
7
MCLK
I
8
PDN
I
9
I2C
I
10
MOUT
O
11
VCOM
O
12
MUTET
O
13
14
15
16
17
18
19
20
VDD
VSS
HVDD
HPR
HPL
MIN
RIN
LIN
-
-
-
O
O
I
I
I
Note: All digital input pins except analog input pins (MIN, RIN and LIN) and internal pull-down pin must not be left
floating.
Handling of Unused Pin
The unused I/O pins should be processed appropriately as below.
Classification
Pin Name
Analog
MOUT, MUTET, HPR, HPL, MIN, RIN, LIN
Digital
CAD0
Setting
These pins should be open.
These pins should be connected to VSS.
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