參數(shù)資料
型號(hào): AK4367VN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Low Power 24-Bit 2ch DAC with HP-AMP & Output Mixer
中文描述: 低功耗24位2通道DAC,具有惠普腺苷
文件頁(yè)數(shù): 14/38頁(yè)
文件大小: 455K
代理商: AK4367VN
ASAHI KASEI
[AK4367]
MS0247-E-02
2005/10
- 14 -
Serial Data Interface
The AK4367 interfaces with external system via the SDATA, BICK and LRCK pins. Five data formats are available and
are selected by setting DIF2, DIF1 and DIF0 bits (Table 3). Mode 0 is compatible with existing 16bit DACs and digital
filters. Mode 1 is a 20bit version of Mode 0. Mode 4 is a 24bit version of Mode 0. Mode 2 is similar to AKM ADCs and
many DSP serial ports. Mode 3 is compatible with the I
2
S serial data protocol. In Modes 2 and 3 with BICK
48fs, the
following formats are also valid: 16-bit data followed by eight zeros (17th to 24th bits) and 20-bit data followed by four
zeros (21st to 24th bits). In all modes, the serial data is MSB first and 2’s complement format.
DIF2 bit
DIF1 bit
DIF0 bit
MODE
0
0
0
0: 16bit, LSB justified
0
0
1
1: 20bit, LSB justified
0
1
0
2: 24bit, MSB justified
0
1
1
3: I
2
S Compatible
1
0
0
4: 24bit, LSB justified
Table 3. Audio Data Format
BICK
Figure
Figure 10
Figure 11
Figure 12
Figure 13
Figure 11
32fs
BICK
64fs
40fs
BICK
64fs
48fs
BICK
64fs
BICK=32fs or 48fs
BICK
64fs
48fs
BICK
64fs
Default
SDATA
Mode 0
BICK
(32fs)
LRCK
SDATA
Mode 0
15 14
6
5
4
BICK
3
2
1
0
15
14
15
14
0
15 14
0
Don’t care
Don’t care
15:MSB, 0:LSB
15
14
6
5
4
3
2
1
0
Lch Data
Rch Data
Figure 10. Mode 0 Timing
SDATA
Mode 1
LRCK
BICK
19
0
19
0
Don’t care
Don’t care
19:MSB, 0:LSB
SDATA
Mode 4
23:MSB, 0:LSB
20
19
0
20
19
0
Don’t care
Don’t care
22 21
22
21
Lch Data
Rch Data
23
23
Figure 11. Mode 1, 4 Timing
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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