參數(shù)資料
型號: AK4367VN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Low Power 24-Bit 2ch DAC with HP-AMP & Output Mixer
中文描述: 低功耗24位2通道DAC,具有惠普腺苷
文件頁數(shù): 23/38頁
文件大小: 455K
代理商: AK4367VN
ASAHI KASEI
[AK4367]
MS0247-E-02
2005/10
- 23 -
3) LIN/RIN/MIN
HP-amp
Power Supply
PDN pin
PMVCM bit
HPL/R pin
(6)
(6)
(7)
LIN/RIN/MIN pin
(4)
(Hi-Z)
(Hi-Z)
PMHPL/R bit
Don’t care
(1) >150ns
(2) >0
(5) >2ms
MUTEN bit
LINL, MINL,RINR, MINR bit
(3) >0
(5) >0
Figure 19. Power-up/down sequence of LIN/RIN/MIN and HP-amp
(1) PDN pin should be set to “H” at least 150ns after the power is supplied. MCLK, BICK and LRCK can be stopped
when DAC is not used.
(2) PMVCM bit should be changed to “1” after PDN pin goes to “H”.
(3) LINL, MINL, RINR and MINR bits should be changed to “1” after PMVCM bit is changed to “1”.
(4) When LINL, MINL, RINR or MINR bit is changed to “1”, LIN, RIN or MIN pin is biased to 0.45 x VDD voltage.
(5) PMHPL, PMHPR and MUTEN bits should be changed to “1” at least 2ms (in case external capacitance at VCOM pin
is 2.2
μ
F) after LINL, MINL, RINR and MINR bits are changed to “1”.
(6) Rise time of headphone amp is determined by external capacitor (C) of MUTET pin. The rise time up to VCOM/2 is
t
r
= 100k x C(typ). When C=1μF, time constant is 100ms(typ).
(7) Fall time of headphone amp is determined by external capacitor (C) of MUTET pin. The fall time down to 0V is t
f
=
200k x C(typ). When C=1μF, time constant is 200ms(typ).
PMHPL, PMHPR, LINL, MINL, RINR and MINR bits should be changed to “0” after HPL and HPR pins go to VSS.
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