參數(shù)資料
型號(hào): AK4366VT
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Low Power 24-Bit 2ch DAC with HP-AMP
中文描述: 低功耗24位2通道DAC,具有惠普腺苷
文件頁(yè)數(shù): 22/31頁(yè)
文件大?。?/td> 349K
代理商: AK4366VT
ASAHI KASEI
[AK4366]
MS0248-E-01
2004/03
- 22 -
Mode Control Interface
Some function of AK4366 can be controlled by both pins (parallel control mode) and register (serial control mode) shown
in Table 12. The serial control interface is enabled by the P/S pin = “L”. Internal registers may be written by 3-wire μP
interface pins: CSN, CCLK and CDTI. The data on this interface consists of Chip Address (2bits, fixed to “01”),
Read/Write (1bit; fixed to “1”, Write only), Register Address (MSB first, 5bits) and Control Data (MSB first, 8bits).
AK4366 latches the data on the rising edge of CCLK, so data should clocked in on the falling edge. The writing of data
becomes valid by 16th CCLK “
”. The clock speed of CCLK is 5MHz (max).
Function
Parallel mode
De-emphasis
44.1kHz
SMUTE
Not Available
Audio I/F Format
I2S, Left justified
Digital Attenuator
Not Available
Bass Boost
Not Available
Power Management
Not Available
Default State at PDN pin = “L”
“H”
Power up
Table 12. Function List
PDN pin = “L” resets the registers to their default values. When the state of P/S pin is changed, AK4366 should be reset
by PDN pin = “L”.
Serial mode
32kHz/44.1kHz/48kHz
Available
I2S, Left Justified, Right justified
Available
Available
Available
Power down
CDTI
CCLK
CSN
C1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
D4
D5
D6
D7
A1
A2
A3
A4
R/W
C0
A0
D0
D1
D2
D3
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (Fixed to “01”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 18. 3-wire Serial Control I/F Timing
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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