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參數(shù)資料
| 型號(hào)： | AK4366VT |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | Low Power 24-Bit 2ch DAC with HP-AMP |
| 中文描述： | 低功耗24位2通道DAC，具有惠普腺苷 |
| 文件頁數(shù)： | 20/31頁 |
| 文件大小： | 349K |
| 代理商： | AK4366VT |
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ASAHI KASEI
[AK4366]
MS0248-E-01
2004/03
- 20 -
Power-Up/Down Sequence
1) Parallel mode (P/S pin = “H”)
Power Supply
PDN pin
Clock Input
(3) >2ms
SDTI pin
DAC Internal
State
PD
Normal Operation
HPL/R pin
MUTEN pin
PD
Normal Operation
(4)
(5)
(6)
Don’t care
Don’t care
(7)
(1)
>150ns
PD
(6) GD
(4)
(5)
(2)
(3) >2ms
(6)
(6) GD
Figure 16. Power-up/down sequence of DAC and HP-amp
(1) PDN pin should be set to “H” at least 150ns after the power is supplied.
(2) External clocks (MCLK, BICK, LRCK) are needed to operate DAC. When PDN pin = “L”, these clocks can be
stopped. Headphone amp can operate without these clocks.
(3) MUTEN pin should be set to “H” at least 2ms after PDN pin goes to “H”.
(4) Rise time of headphone amp is determined by external capacitor (C) of MUTET pin. The rise time up to VCOM/2 is
t
r
= 100k x C(typ). When C=1μF, time constant is 100ms(typ).
(5) Fall time of headphone amp is determined by external capacitor (C) of MUTET pin. The fall time down to 0V is t
f
=
200k x C(typ). When C=1μF, time constant is 200ms(typ).
PDN pin should be set to “L” after HPL and HPR pins go to VSS.
(6) Analog output corresponding to digital input has the group delay (GD) of 20.8/fs (=472μs@fs=44.1kHz).
(7) Power supply should be switched off after headphone amp is powered down (HPL/R pins become “L”).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4367 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 24-Bit 2ch DAC with HP-AMP & Output Mixer |
| AK4367_05 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 24-Bit 2ch DAC with HP-AMP & Output Mixer |
| AK4367VN | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 24-Bit 2ch DAC with HP-AMP & Output Mixer |
| AK4367VNP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
| AK4368 | 制造商:AKM 制造商全稱:AKM 功能描述:PLL & HP-AMP DAC |
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