
ASAHI KASEI
[AK4359]
MS0289-E-00
2004/02
- 30 -
Analog Ground
Digital Ground
System
Controller
BICK
SDTI1
3
LRCK
4
PDN
5
SMUTE/CSN/CAD0
6
ACKS/CCLK/CSL
7
DFS0/CDT/SDA
8
SDTI2
9
SDTI3
10
SDTI4
11
DIF1
12
DEM0
13
DZF2
29
AVDD
28
AVSS
27
VCOM
26
LOUT1
25
ROUT1
24
P/S
23
LOUT2
22
ROUT2
21
LOUT3
20
ROUT3
19
LOUT4
AK4359
18
14
15
17
16
DVDD
DVSS
ROUT4
DEM1/I2C
MCLK
DZF1
30
2
1
Figure 24. Ground Layout
AVSS and DVSS must be connected to the same analog ground plane.
1. Grounding and Power Supply Decoupling
AVDD and DVDD are usually supplied from analog supply in system and should be separated from system digital supply.
Alternatively if AVDD and DVDD are supplied separately, the power up sequence is not critical.
AVSS and DVSS of the
AK4359 must be connected to analog ground plane
. System analog ground and digital ground should be connected
together near to where the supplies are brought onto the printed circuit board. Decoupling capacitor, especially 0.1
μ
F
ceramic capacitor for high frequency should be placed as near to AVDD and DVDD as possible.
2. Voltage Reference
VREFH sets the analog output range. VREFH pin is normally connected to AVDD with a 0.1
μ
F ceramic capacitor. All
signals, especially clocks, should be kept away from the VREFH pin in order to avoid unwanted coupling into the
AK4359.
3. Analog Outputs
The analog outputs are single-ended and centered around the VCOM voltage. The output signal range is typically
3.40Vpp (typ@VDD=5V). The phase of the analog outputs can be inverted channel independently by INVL/INVR bits.
The internal switched-capacitor filter and continuous-time filter attenuate the noise generated by the delta-sigma
modulator beyond the audio passband. The input data format is 2’s complement. The output voltage is a positive full scale
for 7FFFFFH (@24bit) and a negative full scale for 800000H (@24bit). The ideal output is VCOM voltage for 000000H
(@24bit).
DC offsets on analog outputs are eliminated by AC coupling since analog outputs have DC offsets of VCOM + a few mV.