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參數(shù)資料
| 型號： | AK4357 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192kHz 24-Bit 6ch DAC with DSD Input |
| 中文描述： | 192kHz的24位6通道DAC，具有DSD輸入 |
| 文件頁數(shù)： | 24/27頁 |
| 文件大?。?/td> | 195K |
| 代理商： | AK4357 |
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ASAHI KASEI
[AK4357]
MS0088-E-02
2002/07
- 24 -
Analog Ground
Digital Ground
System
Controller
DVSS
D
13
SDTI1
1
14
SDTI2
15
SDTI3
16
LRCK
17
SMUTE
18
CCLK
19
CDTI
20
CSN
21
DSDM
22
DCLK
23
D
2
48
ROUT1+
AK4357
2
2
2
2
3
3
3
3
3
3
D
D
D
D
D
D
D
D
V
A
47
ROUT1-
46
LOUT2+
45
LOUT2-
44
ROUT2+
43
ROUT2-
42
LOUT3+
41
LOUT3-
40
ROUT3+
39
ROUT3-
38
AVSS
M
1
B
9
P
8
C
7
C
6
D
5
D
4
D
3
L
2
L
1
N
NC
24
3
37
AVSS
Figure 13. Ground Layout
1. Grounding and Power Supply Decoupling
AVDD and DVDD are usually supplied from analog supply in system and should be separated from system digital supply.
Alternatively if AVDD and DVDD are supplied separately, the power up sequence is not critical.
AVSS and DVSS of the
AK4357 must be connected to analog ground plane
. System analog ground and digital ground should be connected
together near to where the supplies are brought onto the printed circuit board. Decoupling capacitor, especially 0.1
μ
F
ceramic capacitor for high frequency should be placed as near to AVDD and DVDD as possible.
2. Voltage Reference
VREFH sets the analog output range. VREFH pin is normally connected to AVDD with a 0.1
μ
F ceramic capacitor. All signals,
especially clocks, should be kept away from the VREFH pin in order to avoid unwanted coupling into the AK4357.
3. Analog Outputs
The analog outputs are full-differential outputs and 0.5 x VREFH Vpp (typ) centered around the internal common voltage
(about AVDD/2). The differential outputs are summed externally, V
AOUT
=(AOUT+)-(AOUT-) between AOUT+ and AOUT-.
If the summing gain is 1, the output range is 5.0Vpp (typ @VREFH=5V). The bias voltage of the external summing circuit is
supplied externally. The input data format is 2’s complement. The output voltage(V
AOUT
) is a positive full scale for 7FFFFF
(@24bit) and a negative full scale for 800000H (@24bit). The ideal V
AOUT
is 0V for 000000H (@24bit).
The internal switched-capacitor filter and external low pass filter attenuate the noise generated by the delta-sigma modulator
beyond the audio passband. DC offset on AOUT+/- is eliminated without AC coupling since the analog outputs are
differential.
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| AK4358VQP-L | 功能描述:IC DAC 24BIT SERIAL 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
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