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參數(shù)資料
| 型號： | AK4357 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192kHz 24-Bit 6ch DAC with DSD Input |
| 中文描述： | 192kHz的24位6通道DAC，具有DSD輸入 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大小： | 195K |
| 代理商： | AK4357 |
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ASAHI KASEI
[AK4357]
MS0088-E-02
2002/07
- 11 -
LRCK
fs
88.2kHz
96.0kHz
MCLK
BICK
64fs
128fs
192fs
256fs
384fs
11.2896MHz
12.2880MHz
16.9344MHz
18.4320MHz
22.5792MHz
24.5760MHz
33.8688MHz
36.8640MHz
5.6448MHz
6.1440MHz
Table 4. System Clock Example (Double Speed Mode @Manual Setting Mode)
LRCK
MCLK
fs
128fs
176.4kHz
22.5792MHz
33.8688MHz
192.0kHz
24.5760MHz
36.8640MHz
Table 5. System Clock Example (Quad Speed Mode @Manual Setting Mode)
MCLK
512fs
768fs
256fs
384fs
128fs
192fs
Table 6. Sampling Speed (Auto Setting Mode)
BICK
64fs
192fs
11.2896MHz
12.2880MHz
Sampling Speed
Normal
Double
Quad
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
MCLK (MHz)
256fs
-
-
-
22.5792
24.5760
-
-
128fs
-
-
-
-
-
22.5792
24.5760
192fs
-
-
-
-
-
33.8688
36.8640
384fs
-
-
-
33.8688
36.8640
-
-
512fs
16.3840
22.5792
24.5760
-
-
-
-
768fs
24.5760
33.8688
36.8640
-
-
-
-
Sampling Speed
Normal
Double
Quad
Table 7. System Clock Example (Auto Setting Mode)
2) DSD Mode
The external clocks, which are required to operate the AK4357, are MCLK and DCLK. The master clock (MCLK) should be
synchronized with DSD clock (DCLK) but the phase is not critical. The frequency of MCLK is set by DCKS bit.
All external clocks (MCLK, DCLK) should always be present whenever the AK4357 is in the normal operation mode
(PDN= ”H”). If these clocks are not provided, the AK4357 may draw excess current because the device utilizes dynamic
refreshed logic internally. The AK4357 should be reset by PDN= ”L” after threse clocks are provided. If the external clocks
are not present, the AK4357 should be in the power-down mode (PDN= ”L”). After exiting reset(PDN = “
↑
”) at power-up
etc., the AK4357 is in the power-down mode until MCLK is input. PCM interface signals (BICK, LRCK, SDTI1-3) are fixed to
“H” or “L”.
DCKS
MCLK
512fs
DCLK
64fs
Table 8. System Clock (fs=44.1kHz)
0
1
768fs
64fs
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| AK4358VQP-L | 功能描述:IC DAC 24BIT SERIAL 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
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