參數(shù)資料
型號: AK4342
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 24-Bit Stereo DAC with HP-AMP & 2V Line-Out
中文描述: 24位立體聲DAC惠普腺苷
文件頁數(shù): 12/43頁
文件大小: 580K
代理商: AK4342
ASAHI KASEI
[AK4342]
MS0506-E-02
2006/07
- 12 -
SWITCHING CHARACTERISTICS (Continued)
(Ta=25
°
C; AVDD, DVDD, HVDD, PVDD=2.7
3.6V; TVDD=2.7
3.6V)
Parameter
Control Interface Timing (I
2
C Bus mode):
(Note 29)
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Capacitive load on bus
Pulse Width of Spike Noise Suppressed by Input Filter
Note 29. I
2
C is a registered trademark of Philips Semiconductors.
TVDD voltage must be 2.7V
3.6V in I
2
C mode.
Note 30. Data must be held long enough to bridge the 300ns-transition time of SCL.
Symbol
fSCL
tBUF
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
tF
tSU:STO
Cb
tSP
min
-
1.3
0.6
1.3
0.6
0.6
0
0.1
-
-
0.6
-
0
typ
-
-
-
-
-
-
-
-
-
-
-
max
400
-
-
-
-
-
-
-
0.3
0.3
-
400
50
Units
kHz
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
pF
ns
(Note 30)
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